Datasheet

www.ti.com
TPS65810
TPS65811
SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007
CHG_CONFIG, ADDRESS=9, ALL BITS R/W
B7 B6 B5 B4 B3 B2 B1 B0
Bit name VCHG CHGON NOT USED ISET1_1 ISET1_0 ISET2 PSEL CE
(1)
Function CHARGE SUSPEND NOT USED CHARGE CURRENT SCALING USB SELECTED SYSTEM
VOLTAGE CHARGE FACTOR CURRENT INPUT POWER
SELECTION LIMIT CURRENT SELECTION
LIMIT
When 0 4.36 V CHARGE NOT USED 00= 0.25 10=0.75 100 mA USE USB BATTERY TO
SUSPENDED 01= 0.5 11= 1 CURRENT SYSTEM
Note: Relative to charge current LIMIT
programmed by external ISET pin
When 1 4.20 V CHARGE ON NOT USED 500 mA INPUT INPUT POWER
resistor.
CURRENT TO SYSTEM
(1)
LIMIT SET TO
MAXIMUM
(1) The CE bit state is latched inside the charger control logic (CE latch) during an OUT pin UVLO event, prior to resetting the charge
control register bit CE to its power up default value. The charger CE latch controls the charger and power path state as long as the
TPS65810 is in UVLO mode and an external supply is connected to the charger block. The CE latch is reset to its power-up value
(CE=HI) only when the input power is removed from the charger block. The CE latch is disabled and the CE charge control register bit
sets the charger and power path MOSFETs state when the TPS65810 exits the UVLO mode. This feature avoids a host software loop
when the host algorithm requires a depleted (or absent) battery to be connected to the system bus while input power is present.
GPIO3, ADDRESS= 1C, ALL BITS R/W. NOTE: ONLY BIT B4 CONTROLS CHARGER-RELATED FUNCTIONALITY
B7 B6 B5 B4 B3 B2 B1 B0
Bit name GPIO3i/O GPIO3_LEVEL LDO0_ENABLE CHARGE _VLTG NOT USED GPIO2 _INTSRC GPIO1 _INTSRC GPIO2 _SM2
Function SEE SEE Table 15 SEE Table 15 CHARGE NOT USED SEE Table 15 Table 15 SEE Table 15
Table 15 VOLTAGE
SELECTION
SAFETY BIT
When 0 4.2 V
When 1 4.36 V
CHG_STAT, ADDRESS=A, ALL BITS READ ONLY – POWER UP DEFAULTS SHOW SYSTEM STATUS WHEN EXITING POWER DOWN
B7 B6 B5 B4 B3 B2 B1 B0
Bit name BAT_STAT
(1) (2)
INPUT _PWR THDPPM_ON ACPG
(3)
USBPG
(3)
STAT1 STAT2 INP_OV
Function BATTERY SELECTED THERMAL AC INPUT USB INPUT CHARGE STATUS AC OR USB
SUPPLEMENT INPUT LOOP AND POWER POWER INPUT OVP
MODE STATUS POWER DPPM STATUS STATUS DETECTION
STATUS STATUS
When 0 SUPPLEMENT AC INPUT BOTH OFF AC NOT USB NOT 00 = FAULT/SUSPEND/OFF NO OVP
MODE OFF SELECTED DETECTED DETECTED 01 = CHARGE DONE
10 = FAST CHARGE ON
When 1 SUPPLEMENT USB INPUT DPPM ON OR AC USB OVP
11 = PRECHARGE
MODE ON SELECTED THERMAL ON DETECTED DETECTED DETECTED
(1) The battery supplement is entered when V
(BAT)
– V
(OUT)
> 60 mV (typ), and it ends when V
(BAT)
– V
(OUT)
< 20 mV. When the system
power bus current exceeds the input current limit or the external supply current capability, the supplement mode is set. An oscillatory
behavior for BAT_STAT bit can happen if the battery switch dropout voltage is less than 20 mV (typ) when in supplement mode.
(2) The BAT_STAT is always masked internally, and does not generate interrupts.
(3) The ACPG and USBPG bits have valid data only when V
(LDO_PM)
> 2 V.
Copyright © 2006 – 2007, Texas Instruments Incorporated Submit Documentation Feedback 53
Product Folder Link(s): TPS65810 TPS65811