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V(OUT) + V
(LOW_SYS)
ǒ
1 )
R6
R1
Ǔ
:
where R6 and R1 are external resistors, V
(LOW_SYS)
+ 1 V typical
(1)
TPS65810
TPS65811
SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007
Table 3. Integrated Supply and Drivers I
2
C Registers Power-Up Defaults
SUPPLY POWER-UP DEFAULT OTHER BLOCKS POWER-UP DEFAULT
LDO0 OFF, 3.3 V POWER PATH INPUT TO SYSTEM
LDO1 1.25V, OFF PWM OFF
LDO2 3.3 V, OFF PWM_LED OFF
LDO3 1.505 V, OFF GPIO1 INPUT, SM1 ON/OFF CONTROL
LDO4 1.811 V, OFF GPIO2 INPUT, SM2 ON/OFF CONTROL
LD05 3.111 V, ON GPIO3 INPUT
SIM 2.5 V, ON ADC OFF
RTC_OUT ON, 1.5 V SM3 (WHITE LED) OFF
LDO_PM 3.3 V, ON @ OUT POWERED RGB DRIVER OFF
SM1 OFF, 1.24 V INTERRUPT MASK NONE MASKED
SM2 OFF, 3.32 V POWER GOOD MASK ALL MASKED
CHARGER OFF
After the internal I
2
C register power-up defaults are loaded the power path control logic is enabled, connecting
the external power source to the OUT pin. A status flag (nRAMLOAD) is set to LO in the SOFT_RESET register,
indicating that the I
2
C registers were loaded with the power-up defaults, and the TPS65810 enters the ENABLE
state.
ENABLE: In the ENABLE mode the R ESPWRON output is set to the LO level, the INT pin mode is set to high
impedance and all the power good comparators that monitor the integrated supply outputs are disabled. The
ENABLE mode is used by the TPS65810 to detect when the main system power rail (OUT pin) is powered and
ready to be used on the internal supply power-up. The OUT pin voltage is sensed by an internal
low-system-voltage comparator which holds the IC in the ENABLE mode until the system power-bus voltage
(OUT pin) has reached a minimum operating voltage, defined by the user. The internal comparator senses the
system voltage at pin SYS_IN, and the threshold for the minimum system operating voltage at the OUT pin is set
by the external divider connected from OUT pin to SYS_IN pin. The threshold voltage is calculated as follows:
The minimum system operating voltage should always be set above the internal UVLO threshold V
UVLO
. In
normal application conditions the minimum system operating voltage is usually set to a value that assures that
the TPS65810 integrated regulators are not operating in the dropout region.
When the voltage at the SYS_IN pin exceeds the internal threshold V
(LOW_SYS)
the TPS65810 is ready to start the
system power sequencing, and the SEQUENCING mode is entered.
SEQUENCING – The sequencing state starts immediately after the enable state. In this mode of operation the
integrated supplies are turned ON. The TPS65810 sequencing timing diagram shown in figure details the internal
timing delays and supply sequencing. At the end of the sequencing state the user-programmable reset timer is
started, and the TPS65810 enters the reset state.
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