TPS65810 TPS65811 www.ti.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 FUNCTIONAL BLOCK DIAGRAM TPS65810 AC OUT OUT USB BAT LDO_PM LDO_PM 3.3V 10 mA AGND1 OUT 1.8V/2.5V 8 mA OUT RTC_OUT BAT BAT ON/OFF SIM,RTC LDOS SIM OUT POWER PATH CONTROL LINEAR CHARGER SYSTEM POWER CHARGE MANAGEMENT AGND1 TS DPPM TMR ISET1 OUT AGND1 1.5V 8 mA AGND1 VIN_LDO2 LDO0,1,2 LDO0 3.3V 150 mA AGND1 LDO1 1.25V-3.3V 150 mA LDO2 1.25V-3.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1). VALUE AC and USB with respect to AGND1 ANLG1, ANLG2 with respect to AGND2 –0.3 to V(OUT) V(OUT) with respect to AGND1 5 VIN_LDO12, VIN_LDO35, LDO3, LDO4, LDO5 with respect to AGND2 –0.3 to V(OUT) LDO35_REF, ADC_REF with respect to AGND2 –0.3 to smaller of: 3.6 or V(OUT) SIM, RTC_OUT with respect to AGND1 –0.3 to smaller of: 3.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 RECOMMENDED OPERATING CONDITIONS MIN MAX 4.35 (1) V 0 2.6 V Greater of: 3.6 V OR minimum input voltage required for LDO/converter operation outside dropout region 4.7 AC and USB with respect to AGND1 ANLG1,ANLG2 with respect to AGND2 VIN_LDO35 with respect to AGND2 VIN_LDO12 with respect to AGND1 16.5 4.7 VIN_SM1 with respect to PGND1 4.7 VIN_SM2 with respect to PGND2 4.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – I2C INTERFACE Over recommended operating conditions (typical values at TJ = 25°C), application circuit as in Figure 3 (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT I2C TIMING CHARACTERISTICS tR SCLK/SDATA rise time 300 tF SCLK/SDATA fall time 300 tW(H) SCLK pulse width high tW(L) SCLK Pulse Width Low 1.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – SYSTEM SEQUENCING AND OPERATING MODES Over recommended operating conditions (typical values at TJ = 25°C), application circuit as in Figure 3 (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT QUIESCENT CURRENT IBAT(SLEEP) BAT pin current, sleep mode set Input power not detected, V(BAT) = 4.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – POWER PATH AND CHARGE MANAGEMENT Over recommended operating conditions (typical values at TJ = 25°C), circuit as in Figure 3 (unless otherwise noted).
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – POWER PATH AND CHARGE MANAGEMENT (Continued) Over recommended operating conditions (typical values at TJ = 25°C), application circuit as in Figure 3 (unless otherwise noted).
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – POWER PATH AND CHARGE MANAGEMENT (Continued) Over recommended operating conditions (typical values at TJ = 25°C), circuit as in Figure 3 (unless otherwise noted).
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – LINEAR REGULATORS Over recommended operating conditions (typical values at TJ = 25°C), application circuit Figure 3 (unless otherwise noted).
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – LINEAR REGULATORS (continued) (continued) Over recommended operating conditions (typical values at TJ = 25°C), application circuit as in Figure 3 (unless otherwise noted).
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – SWITCHED-MODE SM1 STEP-DOWN CONVERTER Over recommended operating conditions (typical values at TJ = 25°C), VO(SM1) = 1.24 V, application circuit Figure 3 (unless otherwise noted). PARAMETER IQ(SM1) Quiescent current for SM1 IO(SM1) Output current range VO(SM1) TEST CONDITIONS IQ(SM1) = I(VIN_ SM1), no output load MIN Not switching 0.1 Vin = 4.2 v, Vout = 1.24 V (TPS65810) 600 Vin = 4.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – SWITCHED MODE SM2 STEP DOWN CONVERTER Over recommended operating conditions (typical values at TJ = 25°C), VO(SM1) = 1.24 V, application circuit Figure 3 (unless otherwise noted).
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – ADC Over recommended operating conditions (typical values at TJ = 25°C), V(ADC_REF) =2.535v if external reference voltage is used, application circuit as in Figure 3 (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ANALOG INPUTS VRNG(CH1_5) Full scale input range Ch1 to Ch5 Positive inputs (active clamp) Full scale ~ 2.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – ADC (continued) Over recommended operating conditions (typical values at TJ = 25°C), V(ADC_REF) =2.535v if external reference voltage is used, application circuit as in Figure 3 (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INTERNAL REFERENCE POWER CONSUMPTION PDACTIVE Power dissipation Conversion active PDARMED Power dissipation Not converting 2.3 mW 0.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ELECTRICAL CHARACTERISTICS – LED AND PWM DRIVERS (continued) Over recommended operating conditions (typical values at TJ = 25°C), application circuit as in Figure 3 (unless otherwise noted).
TPS65810 TPS65811 www.ti.
TPS65810 TPS65811 www.ti.com NAME SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 PIN I/O DESCRIPTION EXTERNAL REQUIRED COMPONENTS (SEE APPLICATION DIAGRAM) HOT_RST 15 I/O Hardware reset input, reset generated when connected to ground Connect to an external push-button switch. Connect to external pullup resistor. INT 19 O Interruption pin, open-drain output Connect 100-kΩ external pullup resistor between INT and OUT INT pin is LO when interrupt is requested by TPS65810.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 NAME PIN I/O TMR 13 I Charge safety timer program input External resistor from TMR pin to AGND1 pin sets the charge safety timer time-out value TRSTPWON 20 I System reset pulse-duration setting 100-nF (minimum) capacitor to AGND. External capacitor from TRSTPWON pin to AGND1 pin sets RESPWRON pulse duration.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 APPLICATION DIAGRAM AC _ DC ADAPTER OUTPUT VSIM V RTC_OUT V LDO_PM V L DO 0 V L DO 1 V L DO 2 + - GND USB VOUT POWER + C1 - C2 10 uF 10 uF C3 GND C4 VOUT C5 2 . 2 uF 7 AC 6 USB 5 Supercap A1 V SM2 1 uF C7 1 uF C8 4 . 7 uF C9 4. 7 uF C 10 4 . 7 uF 9 A2 SYSTEM POWER 17 BAT 18 R 12 10 KΩ C 25 Battery 10 uF TS 12 32 LDO 0 TMR 13 37 LDO 1 DPPM R TMR 49 . 9 K R DPPM 37 .
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 TYPICAL CHARACTERISTICS – POWER PATH MANAGEMENT Measured with Application Circuit shown in Figure 3 (unless otherwise noted). SWITCHING FROM AC TO BATTERY ON AC REMOVAL SWITCHING FROM USB TO BATTERY ON USB REMOVAL USB = 5 V, BAT = 3.3 V AC = 5 V, BAT = 3.3 V IBAT IBAT VAC VUSB VOUT VBAT VOUT VBAT Figure 4. 22 Submit Documentation Feedback Figure 5.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 TYPICAL CHARACTERISTICS – LINEAR REGULATORS 0, 1, 2 Measured with application circuit shown in Figure 3 (unless otherwise noted). LOAD REGULATION vs JUNCTION TEMPERATURE LINE REGULATION vs JUNCTION TEMPERATURE -0.500 0.25 VIN_LDO02 = 3.65 V, Load = 10 mA to 150 mA, CO(LDO02) = 1 mF 0.2 -0.600 Line Regulation - % Load Regulation - % -0.550 -0.650 -0.700 0.15 0.1 -0.750 VIN_LDO02 = 3.8 V to 4.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 TYPICAL CHARACTERISTICS – LINEAR REGULATORS 3, 4, 5 Measured with application circuit shown in Figure 3 (unless otherwise noted). LOAD REGULATION vs JUNCTION TEMPERATURE LINE REGULATION vs JUNCTION TEMPERATURE -0.010 -0.5 VIN_LDO 35 = 3 V, Load = 10 mA to 150 mA, CO(LDO 35) = 1 mF -0.55 -0.012 Line Regulation - % Load Regulation - % -0.6 VIN_LDO 35 = 3.3 V to 4.7 V, Load = 100 mA, CO(LDO 35) = 1 mF -0.011 -0.65 -0.70 -0.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 TYPICAL CHARACTERISTICS – SM1 AND SM2 BUCK CONVERTERS Measured with application circuit shown in Figure 3 (unless otherwise noted). PWM MODE EFFICIENCY vs OUTPUT CURRENT EFFICIENCY IN AUTOMATIC PWM/PFM MODE 92 100 90 90 80 70 Efficiency - % Efficiency - % 88 86 84 82 60 50 40 30 VIN_SM2 = 4.6 V, VO (SM2) = 1.8 V, L = 3.3 mH. CO(SM2) = 10 mF 80 78 20 VIN_SM1 = 4 V, VO(SM1) = 1.24 V, 10 L = 3.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 TYPICAL CHARACTERISTICS – DRIVERS Measured with application circuit shown in Figure 3 (unless otherwise noted) LINE TRANSIENT LOAD TRANSIENT VIN_SM2 VO(SM2) VO_SM2 AC = 5 V, VIN_SM2 = 3 V (DC) + 1 V (AC), VO(SM2) = 1.8 V, IO(SM2) = 100 mA, L = 3.3 mF, CO(SM1) = 10 mF, CH1 = VIN_SM2, CH2 = VO(SM2) AC = 5 V, VIN_SM2 = 4 V, VO(SM2) = 1.8 V, IO(SM2) = 0 mA to 600 mA, L = 3.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 SERIAL INTERFACE Overview The TPS65810 is compatible with a host-controlled environment, with internal parameters and status information accessible via an I2C interface. An I2C communication port provides a simple way for an I2C compatible host to access system status information and reset fault modes, functioning as a SLAVE port enabling I2C compatible hosts to WRITE to or to READ from internal registers.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Table 2.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 SCLK SDAT ... A6 ... .. A0 R/W ACK 0 Start R7 0 Slave Address hA0 .. ... R0 Register Address hCMD bqA ACK A6 .. ... A0 R/W ACK 1 0 0 bqA Slave Address hA1 S D7 .. D0 Slave Drives the Data bqDATA bqA ACK Master Drives ACK and Stop hA P Repeated Start, can be replaced by a STOP and START ... SCLK SDAT Start A6 A5 ... A4 ... A0 R/W ACK 0 0 Slave Address hA0 R7 R6 R5 ... ...
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Valid Read Sequences The TPS65810 always ACKs its own address. S hA1 bqA Upon receiving hA1, TPS65810 starts at wherever the RAM address register is pointing. The START and the STOP both act as priority interrupts.
TPS65810 TPS65811 www.ti.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 FUNCTIONALITY REFERENCE GUIDE – HOST INTERFACE AND SYSTEM SEQUENCING INTERRUPT CONTROLLER, OPEN-DRAIN OUTPUT (INT) System Parameters Monitored by Interrupt Controller Supply Output Power Good Fault Detection (1) System Status Modification SM1, SM2, SM3, LDO1, LDO2, LDO3, LDO4, LDO5 Thermal Fault or GPIO 1,2 configured as external interrupt request Can be masked Individually via I2C.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 INTERRUPT CONTROLLER AND SYSTEM SEQUENCING Overview The TPS65810 has two dedicated internal controllers that execute the host interface and system sequencing tasks: a sequencing controller and an interrupt controller.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 SYSTEM SEQUENCING AND TPS65810 OPERATING MODES The TPS65810 has a state machine that controls the device power up and power down sequencing.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Table 3. Integrated Supply and Drivers I2C Registers Power-Up Defaults SUPPLY POWER-UP DEFAULT OTHER BLOCKS POWER-UP DEFAULT LDO0 OFF, 3.3 V POWER PATH INPUT TO SYSTEM LDO1 1.25V, OFF PWM OFF LDO2 3.3 V, OFF PWM_LED OFF LDO3 1.505 V, OFF GPIO1 INPUT, SM1 ON/OFF CONTROL LDO4 1.811 V, OFF GPIO2 INPUT, SM2 ON/OFF CONTROL LD05 3.111 V, ON GPIO3 INPUT SIM 2.5 V, ON ADC OFF RTC_OUT ON, 1.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Power Applied AC, USB or BAT VUVLO OUT SYS_IN VUVLO VLOW_SYS RTC_OUT LDO1 LDO2 LDO4 LDO5 See Note 2 LDO3 SM1 SM2 INT See Note 1 See Note 1 HIGH IMPEDANCE HIGH IMPEDANCE HIGH IMPEDANCE RESPWRON RESET DELAY PROGRAMMED BY EXTERNAL CAPACITOR CONNECTED TO PIN TRSTPWON SEQUENCING NO POWER RESET NORMAL ENABLE 2 I C Registers Loaded From EEPROM (1) SM1 and SM2 are externally enabled by GPIO1 and GPIO2.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 The RESPWRON signal set to a high level is the proper signal to use as an indicator that the device has transitioned out of the reset state. During the power-up sequence the RESPWRON pin is asserted LOW until the RESET TIMER expires. The RESET TIME (treset = 1ms/nF × CTRSTPWON) can be programmed via a capacitor between the TRSTPWON pin and ground. When the RESPWRON signal is LO, all internal and external interrupts are ignored.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 3. ) If sleep was set by a system low voltage detection, power good fault or SLEEP_MODE, with battery and input power present: all external input supplies connected to AC and USB pins must be removed, and then at least one of them reconnected to the system. The input power cycling triggers a transition from SLEEP mode to the ENABLE mode.
TPS65810 TPS65811 www.ti.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 SYSTEM STATUS MONITORED BY INTERRUPT CONTROLLER B7 B6 B5 B4 B3 B2 B1 B0 REGISTER ADC_READING_HI, B7: CONVERSION COMPLETE; INTERNAL STATUS BITS (NO I2C REGISTER BIT AVAILABLE: INPUT OUT OF RANGE (HI OR LO), ANLG1 PIN IMPEDANCE TO AGND2 EXCEEDS 1 mΩ. See additional details in the Analog-to-Digital Converter section.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 FUNCTIONALITY GUIDE — SYSTEM POWER AND CHARGE MANAGEMENT CHARGE MANAGEMENT Fast Charge (1) Charge Current Value Charge Current Scaling IO(BAT), Programmable, 1.5A max 25%, 50%, 75%, 100% of IO(BAT) Set via external resistor Set via I2C (1) Precharge Current Termination Charge Voltage Precharge Voltage SafetyTimer Timeout Power Up Default 25%, 50%, 75%, 100% of I(TERM) value 4.2 V or 4.36 V 3.
TPS65810 TPS65811 www.ti.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 The TPS65810 regulates the voltage at the OUT pin to 4.6 V when one of the external supplies connected to pins AC or USB is powering the OUT pin. The selected input (AC or USB pin) current is limited to a value defined by I2C register settings.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Table 4.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 System Voltage Regulation The system voltage is regulated to a fixed voltage when one of the input power supplies is connected to the system. The system voltage regulation is implemented by a control loop that modulates the selected switch Rds(on). The typical system regulation voltage is 4.6 V. Input Overvoltage Detection The AC and USB input voltages are monitored by voltage comparators that identify an overvoltage condition.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 An internal comparator with a fixed deglitch time, t DGL(NOBAT) monitors the ANLG1 pin voltage, if V(ANLG1) > V(OUT) - VNOBATID a battery removed condition is detected and an internal discharge switch is activated, connecting an internal resistor from BAT pin to AGND1.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 VO(BATREG) Preconditioning Phase Current Regulation Phase Voltage Regulation and Charge Termination Phase DONE IO(BAT) Battery Current, I(BAT) FAST-CHARGE CURRENT Charge Complete Status, Charger Off Battery voltage, V(BAT) V(LOWV) IO(PRECHG) , I(TERM) PRE-CHARGE CURRENT AND TERMINATION THRESHOLD T(PRECHG) T(CHG) DONE Figure 34.
TPS65810 TPS65811 www.ti.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 The ISET1 resistor always sets the maximum charge current if the AC input is selected. When the USB input is selected, the maximum charge current is defined by the USB input current limit and the programmed charge current.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Once termination is detected, a new charge cycle starts if the voltage on the BAT pin falls below the V(RCH) threshold. A new charge start is also triggered if the charger is enabled/disabled/enabled via I2C (CHG_CONFIG register bits CE or CHGON), or if both AC and USB input power are removed and then at least one of them is re-inserted.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 The KPRE constant typical value is 0.1, setting the pre-charge timer value to 10% of the charge safety timer value. When the charger is in suspend mode, set via I2C register CHG_CONFIG bit CHGON or set by a pack temperature fault, the pre-charge safety timer is put on hold (i.e., charge safety timer is not reset). Normal operation resumes when the charger exits the suspend mode.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 thermal loop are active AND the battery voltage is below the recharge threshold. The TPS65810 dynamic timer function circuit monitors the voltage at pin ISET1 during pre-charge and fast charge. When the charger is regulating the charge current, the voltage at pin ISET1 is regulated by the control loops to either VSET or VPRECHG.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 CHG_CONFIG, ADDRESS=9, ALL BITS R/W B7 B6 B5 B4 B3 B2 B1 B0 Bit name VCHG CHGON NOT USED ISET1_1 ISET1_0 ISET2 PSEL CE (1) Function CHARGE VOLTAGE SELECTION SUSPEND CHARGE NOT USED USB CURRENT LIMIT SELECTED INPUT CURRENT LIMIT SYSTEM POWER SELECTION When 0 4.36 V CHARGE SUSPENDED NOT USED 100 mA USE USB CURRENT LIMIT BATTERY TO SYSTEM When 1 4.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 FUNCTIONALITY GUIDE — LINEAR REGULATORS SELECTABLE OUTPUT VOLTAGE LDO Supply ON/OFF Control Output Discharge Switch LDO1 Yes, set via I2C LDO2 SIM OUTPUT VOLTAGE (V), set via I2C IO Max (mA) Acc % Power Up Default 1.25/1.5/1.8/2.5/2.85/3/3.2/3.3 150 3 OFF, 1.25 V 8 1.25/1.5/1.8/2.5/2.85/3/3.2/3.3 150 3 OFF, 3.3 V 2 1.8 / 2.5 8 2 ON, 2.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 LINEAR REGULATORS — FUNCTIONAL DESCRIPTION The TPS65810 offers nine integrated linear regulators, designed to be stable over the operating load range with use of external ceramic capacitors, as long as the recommended filter capacitor values (see application diagram and pinout description) are used. The output voltage can be programmed via I2C (LDO0-2, LDO3-5) or have a fixed output voltage.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Output Voltage Monitoring Internal power good comparators monitor the LDO outputs and detect when the output voltage is below 90% of the programmed value. This information is used by the TPS65810 to generate interrupts or to trigger distinct operating modes, depending on specific I2C register settings. See interrupt and sequencing controller section for additional details.
TPS65810 TPS65811 www.ti.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Table 8. LDO 3–5 Programming Step Values 58 Step B6–B0 Vset Step B6–B0 Vset Step B6–B0 Vset Step B6-B0 Vset 0 000 0000 1.224 32 010 0000 2.040 64 100 0000 2.015 96 110 0000 2.856 1 000 0001 1.250 33 010 0001 2.066 65 100 0001 2.040 97 110 0001 2.882 2 000 0010 1.275 34 010 0010 2.091 66 100 0010 2.907 98 110 0010 3.723 3 000 0011 1.301 35 010 0011 2.117 67 100 0011 2.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 FUNCTIONALITY GUIDE — SWITCHED MODE STEP-DOWN CONVERTERS BUCK CONVERTERS, I2C PROGRAMMABLE OUTPUT VOLTAGE Supply PFM Mode SM1 PFM/PWM with automatic mode selection or PWM only. SM2 Mode of operation set via I2C Standby Mode Standby mode with distinct voltage available .
TPS65810 TPS65811 www.ti.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Soft Start SM1 and SM2 have an internal soft start circuit that limits the inrush current during start-up. An initial delay (170 µsec typ) from the converter enabled command to the converter effectively being operational is required, to assure that the internal circuits of the converter are properly biased.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 PWM CONTROL SECTION (SHOWN FOR SM1, SAME TOPOLOGY FOR SM2) ERROR AMP WITH “TYPE-3 LIKE” COMPENSATION OUT _ OUTPUT VOLTAGE SETTING VIN_SM1 + + OSC _ GATE CONTROL LOGIC L1 (L1) RAMP PEAK-TO-PEAK VOLTAGE PROPORTIONAL TO VIN_SM1 PGND1 VO(SM1) 3.3 mH LSM1 C21 10 mF C22 10 mF SM1 Figure 42.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 OUT VIN_SM1 PFM CONTROL SECTION (SHOWN FOR SM1, SAME TOPOLOGY FOR SM2) GATE CONTROL LOGIC POWER STAGE PEAK CURRENT COMPARATORS _ - LSM1 + RESET + C21 10 mF C22 10 mF PGND1 I(L 1) _ VO(SM1) 3.3 mH I(L1) OUTPUT VOLTAGE COMPARATOR VO(SM1) L1 V(VIN_SM1) 29 W P1 OUT SET BIAS CONTROL + _ V(VIN_SM1) 39 W SM1 Figure 43.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 BURST V(OUT) IPFM(ENTER) INDUCTOR CURRENT IPFM(LEAVE) IPFM(LEAVE) LOAD CURRENT Figure 45. Typical Burst Operation in PFM Mode The PFM operation is disabled and PWM operation set if one of the following events happen during PFM operation: 1. The total burst operation time exceeds 10 µs, typ. 2. The output voltage falls below 2% of the target regulation voltage.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 SWITCHED-MODE STEP-DOWN CONVERTERS — I2C REGISTERS The I2C registers that control buck converter-related functions are shown below. The HEX address for each register is shown by the register name, together with the R or W functionality for the register bits. Shaded values indicate default initial power-up values.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Table 9. Programmable Settings for SM1 and SM2 (Including STANDBY) SetV4_ SM SetV3_ SM SetV2_ SM SetV1_ SM SetV0_ SM 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 1 0 0 1 0 0 0 0 Vset SM1 Vset SM2 SetV4_ SM SetV3_ SM SetV2_ SM SetV1_ SM SetV0_ SM Vset SM1 Vset SM2 0.6 1 1 0 0 0 0 1.24 2.28 0.64 1.08 1 0 0 0 1 1.28 2.36 0.68 1.16 1 0 0 1 0 1.32 2.44 1 0.72 1.
TPS65810 TPS65811 www.ti.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Table 10. ADC input channel overview Channel Connection Parameter Sampled User defined Voltage Range Under Normal Operating Conditions User defined Special Features Full Scale Reading (Internal reference selected ) LSB value Internal pullup current source programmable via I2C: 0/ 10/50/60 µA 2.535 V Full scale reading ÷ 1023 — 2.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 4. Arithmetic Logic Unit (ALU): The ALU performs mathematical operations on the ADC output data as defined by the I2C ADC_READING registers. It executes average calculations or minimum /maximum detection. The result of the calculations is stored in a 11 bit accumulator register (1 bit allocated for carry-over). The accumulator value is transferred to the I2C data register at the end of a conversion cycle.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 The value loaded in the I2C registers ADC READING_HI and ADC READING_LO at the end of a conversion cycle is defined by control bits ADC_READ0 and ADC_READ1 in register ADC READING_HI.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 With the default power-up settings (HOLDOFF=LO, ADC_DELAY register), the TPS65810 executes a multiple-sample conversion cycle if the first sample is taken when the trigger is at its active level. Subsequent samples are converted at the end of the wait time, even if the trigger returns to the non-active level. The external trigger level edge is ignored until the current conversion cycle ends.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 5. Monitor the INT pin. An interrupt triggered by ADC_STATUS=LO indicates that the selected input signal is out of range To exit the continuous mode the host must follow the steps below, if external trigger mode was set: 1. Exit external trigger mode 2. Set REPEAT bit to LO, effectively terminating the repeat mode. This generates an additional conversion; at the end of this conversion the ADC is ready for a new configuration. 3.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ADC State Machine The ADC state machine with all the trigger and operation modes is shown in Figure 51.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 ADC – I2C REGISTERS The I2C registers that control ADC-related functions are shown below. The HEX address for each register is shown by the register name, together with the R or W functionality for the register bits. Default, initial power-up values are shown in bold. In the timing equations, replace Bn with 1 for HI state, and 0 for LO state.
TPS65810 TPS65811 www.ti.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 FUNCTIONALITY GUIDE — LED AND PERIPHERAL DRIVERS WHITE LED CONSTANT CURRENT DRIVER Driver PWM SM3 Duty Cycle Range # of Steps Off (0%), 0.4% -99.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 WHITE LED CONSTANT CURRENT DRIVER The TPS65810 has an integrated boost converter (SM3) that is optimized to drive white LEDs connected in a series configuration. Up to six series white LEDs can be driven, with programmable current and duty cycle adjustable via a dedicated I2C register. The SM3 boost converter (SM3) has a 30-V, 500-mA, low-side integrated power stage switch that drives the external inductor.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 SM3 CONVERTER 50% DUTY CYCLE SM3 CONVERTER <50% DUTY CYCLE SM3 CONVERTER >50% DUTY CYCLE REPETITION PERIOD Figure 54. Example of Distinct Duty Cycles The repetition period can be set using the register SOFT_RESET control bit SM3_LF_OSC to either 183 Hz (HI) or 122 Hz (LO). Each repetition period has a total of 256 pulses, enabling a resolution of 0.4% when programming the duty cycle.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Enabling the SM3 Converter The SM3_SET I2C register controls the SM3 LED switch duty cycle. If the register is set to all zeros SM3 is set to OFF mode. When the host writes a value other than 00 in SM3_SET the SM3 converter is enabled, entering the soft start phase and then normal operation. The SM3 converter can operate with duty cycles varying from 0.4% to 99.6%, with LED switch frequencies of 122 Hz or 180 Hz.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 RGB Driver The TPS65810 has a dedicated driver for an RGB external LED. Three outputs are available (pins RED, GREEN, BLUE), with common settings for operation mode (flash on/off, flash period, flash on time), LED current and phase delay between outputs. The TPS65810 RGB driver continually flashes the external LEDs connected to the RED, GREEN and BLUE pins using the flash operation parameters defined in register RGB_FLASH.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 White LED, PWM Drivers — I2C Registers The I2C registers that control LED AND PWM driver related functions are shown below. The HEX address for each register is shown by the register name, together with the R or W functionality for the register bits. Shaded values indicate default initial power-up values. In the equations replace Bn with 1 for HI state, and 0 for LO state.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Table 11. SM3 Duty Cycle Settings Dec B7-B0 Dcpu Dec B7-B0 Dcpu Dec B7-B0 Dcpu Dec B7-B0 Dcpu Dec B7-B0 Dcpu 0 0000 0000 – 52 0011 0100 0.203 104 0110 1000 0.406 156 1001 1100 0.609 208 1101 0000 0.813 1 0000 0001 0.004 53 0011 0101 0.207 105 0110 1001 0.41 157 1001 1101 0.613 209 1101 0001 0.816 2 0000 0010 0.008 54 0011 0110 0.211 106 0110 1010 0.414 158 1001 1110 0.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Table 12. RGB Duty Cycle Control Settings RGB_D4 RGB_D3 RGB_D2 RGB_D1 RGB_D0 DC(%) FLASH_PER3 FLASH_PER2 FLASH_PER1 FLASH_PER0 0 0 0 0 0 0.00 0 0 0 0 1 0 0 0 0 1 3.23 0 0 0 1 1.5 0 0 0 1 0 6.45 0 0 1 0 2 0 0 0 1 1 9.68 0 0 1 1 2.5 0 0 1 0 0 12.90 0 1 0 0 3 0 0 1 0 1 16.13 0 1 0 1 3.5 0 0 1 1 0 19.35 0 1 1 0 4 0 0 1 1 1 22.58 0 1 1 1 4.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Table 13. PWM Frequency and Duty Cycle Settings PWM FREQUENCY TABLE 84 PWM_D DUTY CYCLE PWM_F2 PWM_F1 PWM_F0 F (Hz) PWM2_D3 PWM2_D2 PWM2_D1 PWM2_D0 D_cycle (pu) 0 0 0 15600 0 0 0 0 0.0625 0 0 1 7800 0 0 0 1 0.125 0 1 0 4500 0 0 1 0 0.1875 0 1 1 3000 0 0 1 1 0.25 1 0 0 2000 0 1 0 0 0.3125 1 0 1 1500 0 1 0 1 0.375 1 1 0 1000 0 1 1 0 0.
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TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 General Purpose I/Os — GPIO 1, 2, 3 The TPS65810 integrates 3 general purpose open drain ports (GPIOs) that can be configured as selectable inputs or outputs. When configured as outputs the output level can be set to LO or HI via I2C commands. When the GPIOs are configured as inputs the action to be taken when a transition or HI/LO level is detected at the GPIO pin is selectable via I2C.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Function Implementation: I2C Commands Versus GPIO Commands Some of the GPIO SM1/SM2 control functions overlap I2C register control functions. Table 14 describes the TPS65810 action when the GPIO’s command and I2C registers commands are not compatible with each other. Table 14.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 GPIO Configuration Table Table 15 describes the I2C register settings required to program the available GPIO modes. The GPIO pins logic level is available at register SM1_STANDBY, bits B5, B6 and B7. Table 15.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 GPIOs — I2C Registers The I2C registers that control GPIO-related functions are shown below. The HEX address for each register is shown by the register name, together with the R or W functionality for the register bits. Shaded values indicate default initial power-up values.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 APPLICATION INFORMATION INDUCTOR AND CAPACITOR SELECTION — CONVERTERS SM1 AND SM2 SM1 and SM2 are designed with internal voltage mode compensation and the stabilization is based on choosing an LC filter that has a corner frequency around 27 kHz. It is not recommended to use LC values that would be outside the range of 13 kHz to 40 kHz. Equation 9 calculates the corner frequency of the output LC filter.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Table 16. Inductors for Typical Operation Conditions (continued) DEVICE INDUCTOR VALUE TYPE COMPONENT SUPPLIER DCDC2 converter 3.3 µH CDRH2D18/HPNP-3R3 Sumida 3.3 µH VLF4012AT-3R3M1R3 TDK 2.2 µH VLCF4020-2R2 TDK 3.3 µH CDRH3D14/HPNP-3R2 Sumida 3.3 µH CDRH4D28C-3R2 Sumida 3.3 µH MSS5131-332 Coilcraft 2.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 INPUT CAPACITOR SELECTION, SM1, SM2 CONVERTERS Buck converters have a pulsating input current that can generate high input voltage spikes at VIN. A low ESR input capacitor is required to filter the input voltage, minimizing the interference with other circuits connected to the same power supply rail. Each dc-dc converter requires a 10-µF ceramic input capacitor on its input pin.
TPS65810 TPS65811 www.ti.com SLVS658B – MARCH 2006 – REVISED FEBRUARY 2007 Program BAT Short Circuit Delay (Used for inserting battery) C DPPM + t DELAY I DPPM + 4.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TPS65810RTQR QFN RTQ 56 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2000 330.0 16.4 8.3 8.3 2.25 12.0 16.0 Q2 TPS65810RTQT QFN RTQ 56 250 180.0 16.4 8.3 8.3 2.25 12.0 16.0 Q2 TPS65811RTQR QFN RTQ 56 2000 330.0 16.4 8.3 8.3 2.25 12.0 16.
PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS65810RTQR QFN RTQ 56 2000 367.0 367.0 38.0 TPS65810RTQT QFN RTQ 56 250 210.0 185.0 35.0 TPS65811RTQR QFN RTQ 56 2000 367.0 367.0 38.0 TPS65811RTQT QFN RTQ 56 250 210.0 185.0 35.
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