Datasheet
TPS65708
SLVSAE1A –OCTOBER 2010– REVISED FEBRUARY 2011
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ELECTRICAL CHARACTERISTICS (continued)
Unless otherwise noted: VIN1 = VIN2 = VCC = 5V, L = 1.5µH, C
OUTDCDCx
= 10µF, C
OUTLDOx
= 2.2µF, T
A
= –40°C to 85°C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
OSCILLATOR
f
SW
Oscillator frequency 2.03 2.25 2.48 MHz
OUTPUT
V
OUT1
DCDC1 default output voltage VIN1 ≥ 3.6V 3.3 V
V
OUT2
DCDC2 default output voltage VIN2 ≥ 3.6V 1.8 V
dcdc converter input voltage below
I
FB
FB pin input current 0.1 µA
undervoltage lockout threshold
FB pin input resistance due to internal dcdc converter input voltage above
R
FB
990 kΩ
voltage divider undervoltage lockout threshold; V
OUT
= 3.3V
FB pin input resistance due to internal dcdc converter input voltage above
R
FB
585 kΩ
voltage divider undervoltage lockout threshold; V
OUT
= 1.8V
VIN1 and VIN2 = 3.6V to 6V, +1% voltage
DC output voltage accuracy
(1)
positioning active; PFM operation, 1.25% 3%
0 mA < I
OUT
< I
OUT
max
V
OUT
VIN1 / VIN2 = 3.3V to 6V, PWM operation,
DC output voltage accuracy –1.5% 1.5%
0 mA < I
OUT
< I
OUT
max
DC output voltage load regulation PWM operation 0.5 %/A
Time from UVLO is exceeded (Vin > 3.6V) to
t
Start
Start-up time 200 µs
Start switching
t
Ramp
V
OUT
ramp time Time to ramp from 5% to 95% of V
OUT
250 µs
R
DIS
Internal discharge resistor at L1 and L2 DCDCx disabled; 1V < VIN1/2 < 3.6V 300 400 550 Ω
THERMAL PROTECTION SEPARATELY FOR DCDC1, DCDC2 and LDO1
T
SD
Thermal shutdown Increasing junction temperature 150 °C
Thermal shutdown hysteresis Decreasing junction temperature 30 °C
VLDO1, VLDO2 LOW DROPOUT REGULATOR
V
INLDO
Input voltage range for LDO1 and LDO2 1.7 6 V
V
LDO1
LDO1 Default Output Voltage (1) 2.8 V
V
LDO2
LDO2 Default Output Voltage 1.2 V
I
O
Output current for LDO1 and LDO2 200 mA
I
SC
LDO1 and LDO2 short circuit current limit V
LDOx
= GND 260 360 550 mA
Dropout voltage at LDOx I
O
= 200mA; VINLDOx = 3.3V 200 mV
Dropout voltage at LDOx I
O
= 200mA; VINLDOx = 1.8V 300 mV
Output voltage accuracy for LDO1 and
I
O
= 200mA –2% 2%
LDO2
VINLDO = VLDO + 0.5V (min 1.7V) to 6V,
Line regulation for LDO1 and LDO2 –1% 1%
I
O
= 50mA
Load regulation for LDO1 and LDO2 I
O
= mA to 200mA –1.5 1 %
f = 10kHz, C
OUT
≥ 2.2μF VINLDOx = 5V, V
OUT
PSRR Power-Supply Rejection Ratio 50 dB
= 2.8V, I
OUT
= 100mA
µV
Vn Output noise voltage V
OUT
= 2.8V, BW = 10Hz to 100kHz 160
RMS
Internal soft-start when LDO is enabled;
t
Ramp
V
OUT
ramp time 250 µs
Time to ramp from 5% to 95% of V
OUT
Internal discharge resistor at VLDO1 and
R
DIS
V
IN
< UVLO 200 400 550 Ω
VLDO2
(1) VINLDO > 2.8V
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