TPS65270 High Current, Synchronous Step Down Dual Buck DC/DC Converter Evaluation Module User's Guide Literature Number: SLVU474B August 2011 – Revised December 2011
SLVU474B – August 2011 – Revised December 2011 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated
Contents 1 2 3 4 5 Introduction ........................................................................................................................ Background ........................................................................................................................ Schematic .......................................................................................................................... Board Layout ................................................................................
www.ti.com List of Figures 1 TPS65270 Schematic ...................................................................................................... 6 2 Placement (Top Layer) ..................................................................................................... 7 3 Board Layout (Top Layer).................................................................................................. 7 4 Board Layout (Bottom Layer) ..................................................................
1 Introduction This document presents the information required to power the TPS65270 PMIC as well as the support documentation including schematic and bill of materials. 2 Background The TPS65270 PMIC is designed to provide 2-A and 3-A continuous currents with an operational range of 4.5 V to 16 V and an externally set switching frequency ranging from 300 kHz to 1.4 MHz. When the PMIC is not fully loaded, Buck1 can be loaded to 2.5 A and Buck2 to 3.5 A.
Schematic 3 www.ti.com Schematic Figure 1.
Board Layout www.ti.com 4 Board Layout Figure 2.
Board Layout www.ti.com Figure 3. Board Layout (Top Layer) Figure 4.
Bench Test Setup Conditions www.ti.com 5 Bench Test Setup Conditions 5.1 Headers Description and Jumper Placement A JP1/ EN1 VOUT1 VIN JP3/LOW_P GND 12V VOUT2 JP2/EN2 B Figure 5.
Power-Up Procedure 5.2 www.ti.com Jumpers Table 2. Jumpers 6 JUMPER NO.
Bill of Materials www.ti.com 7 Bill of Materials Table 3. Bill of Materials ITEM (2) (3) (4) DESIGNATOR VALUE FOOTPRINT MANUFACTURER DESCRIPTION 1 2 C1, C7 4.7nF 603 Generic CAP 4700PF 50V CERAMIC X7R 0603 2 2 C2, C6 10nF 603 Generic CAP 10000PF 50V CERM X7R 0603 3 2 C3, C5 2.
Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards.
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