Datasheet

TPS65251
www.ti.com SLVSAA4D –JUNE 2010–REVISED DECEMBER 2012
PACKAGE DISSIPATION RATINGS
(1)
T
A
= 25°C T
A
= 55°C T
A
= 85°C
PACKAGE θ
JA
(°C/W)
POWER RATING (W) POWER RATING (W) POWER RATING (W)
RHA 30 3.33 2.3 1.3
(1) Based on JEDEC 51.5 HIGH K environment measured on a 76.2 x 114 x .6-mm board with the following layer arrangement:
(a) Top layer: 2 Oz Cu, 6.7% coverage
(b) Layer 2: 1 Oz Cu, 90% coverage
(c) Layer 3: 1 Oz Cu, 90% coverage
(d) Bottom layer: 2 Oz Cu, 20% coverage
ELECTRICAL CHARACTERISTICS
T
J
= -40°C to 125°C, VIN = 12 V, f
SW
= 1 MHz (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT SUPPLY UVLO AND INTERNAL SUPPLY VOLTAGE
V
IN
Input Voltage range 4.5 18 V
IDD
SDN
Shutdown EN pin = low for all converters 1.3 mA
Converters enabled, no load
Buck 1 = 3.3 V, Buck 2 = 2.5 V,
IDD
Q
Quiescent, low power disabled (Lo) 20 mA
Buck 3 = 7.5 V,
L = 4.7 µH , f
SW
= 800 kHz
Converters enabled, no load
Buck 1 = 3.3 V, Buck 2 = 2.5 V,
IDD
Q_LOW_P
Quiescent, low power enabled (Hi) 1.5 mA
Buck 3 = 7.5 V,
L = 4.7 µH , f
SW
= 800 kHz
Rising V
IN
4.22
UVLO
VIN
V
IN
under voltage lockout V
Falling V
IN
4.1
UVLO
DEGLITCH
Both edges 110 µs
V
3V
Internal biasing supply I
LOAD
= 0 mA 3.2 3.3 3.4 V
I
3V
Biasing supply output current V
IN
= 12 V 10 mA
V
7V
Internal biasing supply I
LOAD
= 0 mA 5.63 6.25 6.88 V
I
7V
Biasing supply output current V
IN
= 12 V 10 mA
Rising V7V 3.8
V7V
UVLO
UVLO for internal V7V rail V
Falling V7V 3.6
V7V
UVLO_DEGLITCH
Falling edge 110 µs
BUCK CONVERTERS (ENABLE CIRCUIT, CURRENT LIMIT, SOFT START, SWITCHING FREQUENCY AND SYNC CIRCUIT, LOW POWER MODE)
Enable threshold high V3p3 = 3.2 V - 3.4 V, V
ENX
rising 1.55 1.82
V
IH
V
Enable high level External GPIO, V
ENX
rising 0.66 x V
3V
Enable threshold low V3p3 = 3.2 V - 3.4 V, V
ENX
falling 0.98 1.24
V
IL
V
Enable low level External GPIO, V
ENX
falling 0.33 x V
3V
R
EN_DIS
Enable discharge resistor -10% 2.1 10% kΩ
ICH
EN
Pull up current enable pin 1.1 µA
t
D
Discharge time enable pins Power-up 10 ms
I
SS
Soft start pin current source 5 µA
F
SW_BK
Converter switching frequency range Set externally with resistor 0.3 2.2 MHz
R
FSW
Frequency setting resistor Depending on set frequency 50 600 kΩ
f
SW_TOL
Internal oscillator accuracy f
SW
= 800 kHz -10 10 %
V
SYNCH
External clock threshold high V3p3 = 3.3 V 1.55 V
V
SYNCL
External clock threshold Low V3p3 = 3.3 V 1.24 V
SYNC
RANGE
Synchronization range 0.2 2.2 MHz
SYNC
CLK_MIN
Sync signal minimum duty cycle 40 %
SYNC
CLK_MAX
Sync signal maximum duty cycle 60 %
VIH
LOW_P
Low power mode threshold high V3p3 = 3.3 V, V
ENX
rising 1.55 V
VIL
LOW_P
Low power mode threshold Low V3p3 = 3.3 V, V
ENX
falling 0.98 1.24 V
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