Datasheet

V
OUT
V
OUT_PK
V = V +
OUT_PK OUT
DV
OUT
¾
2
DV =
OUT
1
¾
C
·
(
L I·
LIMIT
2
¾
2
·
V
IN
¾
V V - V
OUT IN OUT
· ( )
-
I
LOAD
¾
f
SLEEP_CLK
)
I = T
LIMIT SLEEP_CLK
0.25 · ·
V - V
IN OUT
¾
L
TPS65251
SLVSAA4D –JUNE 2010–REVISED DECEMBER 2012 www.ti.com
BUCK 2 AND 3 LOSSES (W) BUCK 2 AND 3 LOSSES (W)
vs vs
OUTPUT CURRENT OUTPUT CURRENT
V
IN
= 12 V, f
SW
= 500 kHz V
IN
= 12 V, f
SW
= 1.1 MHz
V
O
(From Top to Bottom) = 5 V , 3.3 V, 2.5 V, 1.8 V, 1.2 V V
O
(From Top to Bottom) = 5 V , 3.3 V, 2.5 V, 1.8 V, 1.2 V
Figure 29. Figure 30.
Low Power Mode Operation
By pulling the Low_p pin high all converters will operate in pulse-skipping mode, greatly reducing the overall
power consumption at light and no load conditions. Although each buck converter has a skip comparator that
makes sure regulation is not lost when a heavy load is applied and low power mode is enabled, system design
needs to make sure that the LP pin is pulled low for continuous loading in excess of 100 mA.
When low power is implemented, the peak inductor current used to charge the output capacitor is:
(5)
Where T
SLEEP_CLK
is half of the converter switching period, 2/f
SW
.
The size of the additional ripple added to the output is:
(6)
And the peak output voltage during low power operation is:
(7)
Figure 31. Peak Output Voltage During Low Power Operation
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