Datasheet

TPS65250
SLVSAA3C –JUNE 2010–REVISED OCTOBER 2012 www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12 V ±5%, VINB2, VINB3 = 5 V ±5%, T
J
= –40°C to 125°C, f
SW
= 1 MHz (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
F
SW_BK
Converter switching frequency range Set externally with resistor 0.3 2.2 MHz
R
FSW
Frequency setting resistor Depending on set frequency 50 600 kΩ
f
SW_TOL
Internal oscillator accuracy f
SW
= 800 kHz -10 10 %
V
SYNCH
External clock threshold high V3p3 = 3.3 V 1.55 V
V
SYNCL
External clock threshold low V3p3 = 3.3 V 1.24 V
SYNC
RANGE
Synchronization range 0.2 2.2 MHz
SYNC
CLK_MIN
Sync signal minimum duty cycle 40 %
SYNC
CLK_MAX
Sync signal maximum duty cycle 60 %
VIH
LOW_P
Low power mode threshold high V3p3 = 3.3 V, V
ENX
rising 1.55 V
VIL
LOW_P
Low power mode threshold Low V3p3 = 3.3 V, V
ENX
falling 1.24 V
FEEDBACK, REGULATION, OUTPUT STAGE
V
IN
= 12 V , T
J
= 25°C -1% 0.8 1%
V
FB
Feedback voltage V
V
IN
= 4.5 to 18V -2% 0.8 2%
Minimum on time
t
ON_MIN
80 120 ns
(current sense blanking)
D Duty cycle range 5 95 %
Line regulation - DC V
INB
= 4.5 V to 18 V,
V
LINEREG
0.5 %/V
∆V
OUT
/∆V
INB
I
OUT
= 1000 mA
Load regulation - DC I
OUT
= 10 % - 90%
V
LOADREG
0.5 %/A
∆V
OUT
/∆I
OUT
I
OUT,MAX
C
OUT
Output capacitance Recommended f
SW
= 1.14 MHz 10 22 µF
L Nominal Inductance Recommended f
SW
= 1.14 MHz 4.7 µH
R
DS_ON_HI_BUCK1
Turn-On resistance high side Buck 1 V
IN
= 12 V, T
J
= 25°C 95 mΩ
R
DS_ON_LO_BUCK1
Turn-On resistance low side Buck 1 V
IN
= 12 V, T
J
= 25°C 50 mΩ
R
DS_ON_HI_BUCK23
Turn-On resistance high side Buck 2 and 3 V
IN
= 12 V, T
J
= 25°C 120 mΩ
R
DS_ON_LO_BUCK23
Turn-On resistance low side Buck 2 and 3 V
IN
= 12 V, T
J
= 25°C 80 mΩ
Transient V
OUT
variation during load ∆I = 1 A in ∆t =1 µs,
V
UTTOLTRAN 1
1.5 %
transient measured at feedback point C
LOAD
= 22 µF, ceramic
Transient V
OUT
variation during load I = 0.75 A in ∆t = 1 µs,
V
UTTOLTRAN 2
1.5 %
transient measured at feedback point C
LOAD
= 22 µF, ceramic
Transient V
OUT
variation during load I = 0.75 A in ∆t = 1 µs,
V
UTTOLTRAN 3
1.5 %
transient measured at feedback point C
LOAD
= 22 µF, ceramic
I
LIMIT1
Peak inductor current limit range 1 4 A
I
LIMIT2
Peak inductor current limit range 1 3 A
I
LIMIT3
Peak inductor current limit range 1 3 A
POWER GOOD RESET GENERATOR
Output falling (device will be
85
disabled after t
ON_HICCUP
)
VUV
BUCKX
Threshold voltage for buck under voltage %
Output rising (PG will be asserted) 90
t
UV_deglitch
Deglitch time (both edges) Each buck 11 ms
t
ON_HICCUP
Hiccup mode ON time VUV
BUCKX
asserted 12 ms
All converters disabled. Once
t
OFF_HICCUP
Hiccup mode OFF time t
OFF_HICCUP
elapses, all converters 20 ms
will go through sequencing again.
Output rising (high side fet will be
109
forced off)
VOV
BUCKX
Threshold voltage for buck over voltage %
Output falling (high side fet will be
107
allowed to switch )
Measured after the later of Buck1 or
t
RP
minimum reset period 1000 ms
Buck 3 power-up successfully
DYING GASP STORAGE AND RELEASE CIRCUIT
V
IN
= 12 V, storage charging from 0
I
PRECHARGE_LIMIT
Inrush current storage 0.1 0.15 A
V to V
IN
Current limit for current dumped from Dump mode. Current flowing from
I
STORAGE_LIMIT
2 3 A
storage to VIN V
STRG
to V
IN
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