Datasheet

I = T
LIMIT SLEEP_CLK
0.25 · ·
V - V
IN OUT
¾
L
T = T + P
HOT_SPOT A DIS JA
· q
TPS65250
www.ti.com SLVSAA3C –JUNE 2010–REVISED OCTOBER 2012
(8)
Where:
T
A
is the ambient temperature
P
DIS
is the sum of losses in all converters
θ
JA
is the junction to ambient thermal impedance of the device and it is heavily dependant on board layout
Figure 36. Buck 1 Figure 37. Buck 1
V
IN
= 12 V, f
SW
= 500 kHz V
IN
= 12 V, f
SW
= 1.1 MHz
Figure 38. Buck 2 and 3 Figure 39. Buck 2 and 3
V
IN
= 12 V, f
SW
= 500 kHz V
IN
= 12 V, f
SW
= 1.1 MHz
Low Power Mode Operation
By pulling the Low_p pin high all converters will operate in pulse-skipping mode, greatly reducing the overall
power consumption at light and no load conditions. Although each buck converter has a skip comparator that
makes sure regulation is not lost when a heavy load is applied and low power mode is enabled, system design
needs to make sure that the LP pin is pulled low for continuous loading in excess of 100 mA.
When low power is implemented, the peak inductor current used to charge the output capacitor is:
(9)
Where T
SLEEP_CLK
is half of the converter switching period, 2/f
SW
.
The size of the additional ripple added to the output is:
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