Datasheet

Re
2
3
sr Co
C
R
×
=
3
L
C
R Co
C
R
×
=
1
2
O L
fp
C R p
=
× ×
2
C
M ps
fc Vo Co
R
g Vref gm
p × × ×
=
× ×
Current Sense
I/V Gain
V.V
ref
80=
o
V
L
i
ESR
R
1
R
2
R
c
R
o
C
c
C
Roll
C
ff
C
L
R
ug
M
130=
COMPx
FBx
Gm=10A/V
TPS65250
www.ti.com SLVSAA3C –JUNE 2010–REVISED OCTOBER 2012
Figure 32. Loop Compensation
The design guidelines for TPS65250 loop compensation are as follows:
1. Set up cross over frequency fc.
2. R
C
can be determined by:
(4)
Where is the G
M
amplifier gain (130 µA/V), is the power stage gain (10 A/V).
3. Place a compensation zero at the dominant pole,
(5)
C
C
can be determined by:
(6)
4. C2 is optional. It can be used to cancel the zero from Co’s ESR.
(7)
In some applications the transient response performance is the primary goal, a type-III compensation circuit
allows the system having one more zero. The additional zero provides extra phase margin and the system can
achieve an extra high crossover frequency. C3 can be added at the upper leg of the output divider to form a zero
with R1.
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