Datasheet

TPS65217A, TPS65217B, TPS65217C, TPS65217D
SLVSB64F NOVEMBER 2011REVISED APRIL 2013
www.ti.com
LOAD SWITCH1 / LDO3 CONTROL REGISTER (DEFLS1)
Address – 0x14h (Password Protected)
DATA BIT D7 D6 D5 D4 D3 D2 D1 D0
FIELD NAME not used not used LS1LDO3 LDO3[4:0]
READ/WRITE R/W R/W R/W R/W R/W R/W R/W R/W
TPS65217A 0 0 0 0 0 1 1 0
TPS65217B 0 0 1 1 1 1 1 1
RESET
VALUE
TPS65217C 0 0 1 0 0 1 1 0
TPS65217D 0 0 1 0 0 1 1 0
FIELD NAME BIT DEFINITION (TPS65217A)
not used N/A
not used N/A
LS / LDO configuration bit
LS1LDO3 0 – FET functions as load switch (LS1)
1 – FET is configured as LDO3
LDO3 output voltage setting (LS1LDO3 = 1)
0 0000 – 1.50 V 0 1000 – 1.90 V 1 0000 – 2.55 V 1 1000 – 2.95 V
0 0001 – 1.55 V 0 1001 – 2.00 V 1 0001 – 2.60 V 1 1001 – 3.00 V
0 0010 – 1.60 V 0 1010 – 2.10 V 1 0010 – 2.65 V 1 1010 – 3.05 V
LDO3[4:0] 0 0011 – 1.65 V 0 1011 – 2.20 V 1 0011 – 2.70 V 1 1011 – 3.10 V
0 0100 – 1.70 V 0 1100 – 2.30 V 1 0100 – 2.75 V 1 1100 – 3.15 V
0 0101 – 1.75 V 0 1101 – 2.40 V 1 0101 – 2.80 V 1 1101 – 3.20 V
0 0110 – 1.80 V 0 1110 – 2.45 V 1 0110 – 2.85 V 1 1110 – 3.25 V
0 0111 – 1.85 V 0 1111 – 2.50 V 1 0111 – 2.90 V 1 1111 – 3.30 V
FIELD NAME BIT DEFINITION (TPS65217B)
not used N/A
not used N/A
LS / LDO configuration bit
LS1LDO3 0 – FET functions as load switch (LS1)
1 – FET is configured as LDO3
LDO3 output voltage setting (LS1LDO3 = 1)
0 0000 – 1.50 V 0 1000 – 1.90 V 1 0000 – 2.55 V 1 1000 – 2.95 V
0 0001 – 1.55 V 0 1001 – 2.00 V 1 0001 – 2.60 V 1 1001 – 3.00 V
0 0010 – 1.60 V 0 1010 – 2.10 V 1 0010 – 2.65 V 1 1010 – 3.05 V
LDO3[4:0] 0 0011 – 1.65 V 0 1011 – 2.20 V 1 0011 – 2.70 V 1 1011 – 3.10 V
0 0100 – 1.70 V 0 1100 – 2.30 V 1 0100 – 2.75 V 1 1100 – 3.15 V
0 0101 – 1.75 V 0 1101 – 2.40 V 1 0101 – 2.80 V 1 1101 – 3.20 V
0 0110 – 1.80 V 0 1110 – 2.45 V 1 0110 – 2.85 V 1 1110 – 3.25 V
0 0111 – 1.85 V 0 1111 – 2.50 V 1 0111 – 2.90 V 1 1111 – 3.30 V
64 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: TPS65217A TPS65217B TPS65217C TPS65217D