Datasheet

TPS65217A, TPS65217B, TPS65217C, TPS65217D
www.ti.com SLVSB64F –NOVEMBER 2011–REVISED APRIL 2013
REGISTER ADDRESS MAP
DEFAULT
REGISTER ADDRESS (HEX) NAME PROTECTION DESCRIPTION
VALUE
0 0 CHIPID None N/A Chip ID
1 1 PPATH None N/A Power path control
2 2 INT None N/A Interrupt flags and masks
3 3 CHGCONFIG0 None N/A Charger control register 0
4 4 CHGCONFIG1 None N/A Charger control register 1
5 5 CHGCONFIG2 None N/A Charger control register 2
6 6 CHGCONFIG3 None N/A Charger control register 3
7 7 WLEDCTRL1 None N/A WLED control register
8 8 WLEDCTRL2 None N/A WLED PWM duty cycle
9 9 MUXCTRL None N/A Analog Multiplexer control register
10 0A STATUS None N/A Status register
11 0B PASSWORD None N/A Write password
12 0C PGOOD None N/A Power good (PG) flags
13 0D DEFPG Level1 N/A Power good (PG) delay
14 0E DEFDCDC1 Level2 N/A DCDC1 voltage adjustment
15 0F DEFDCDC2 Level2 N/A DCDC2 voltage adjustment
16 10 DEFDCDC3 Level2 N/A DCDC3 voltage adjustment
Slew control DCDC1-3/PFM mode
17 11 DEFSLEW Level2 N/A
enable
18 12 DEFLDO1 Level2 N/A LDO1 voltage adjustment
19 13 DEFLDO2 Level2 N/A LDO2 voltage adjustment
20 14 DEFLS1 Level2 N/A LS1/LDO3 voltage adjustment
21 15 DEFLS2 Level2 N/A LS2/LDO4 voltage adjustment
22 16 ENABLE Level1 N/A Enable register
23 18 DEFUVLO Level1 N/A UVLO control register
24 19 SEQ1 Level1 N/A Power-up STROBE definition
25 1A SEQ2 Level1 N/A Power-up STROBE definition
26 1B SEQ3 Level1 N/A Power-up STROBE definition
27 1C SEQ4 Level1 N/A Power-up STROBE definition
28 1D SEQ5 Level1 N/A Power-up delay times
29 1E SEQ6 Level1 N/A Power-up delay times
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