Datasheet

TPS65217A, TPS65217B, TPS65217C, TPS65217D

SLVSB64F –NOVEMBER 2011–REVISED APRIL 2013

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PASSWORD PROTECTION

Registers 0x0B through 0x1F with exception of the password register are protected against accidental write by a

8-bit password. The password needs to be written prior to writing to a protected register and is automatically

reset to 0x00h after the following I

C transaction, regardless of the register that was accessed and regardless of

the transaction type (read or write). The password is required for write access only and is not required for read

access.

Level1 Protection

To write to a Level1 protected register:

1. Write the address of the destination register, XORed with the protection password (0x7Dh) to the

PASSWORD register.

2. Write data to the password protected register.

3. Only if the content of the PASSWORD register XORed with the address send in step 2 matches 0x7Dh, the

data will be transferred to the protected register. Otherwise the transaction will be ignored. In any case the

PASSWORD register is reset to 0x00 after the transaction.

The cycle needs to be repeated for any other register that is Level1 write protected.

Level2 Protection

To write to a Level2 protected register:

1. Write the address of the destination register, XORed with the protection password (0x7Dh) to the

PASSWORD register.

2. Write to the password protected register. The register value will not change at this point but the data will be

temporarily stored if the content of the PASSWORD register XORed with the address send in step 2 matches

0x7Dh. In any case, the PASSWORD register is reset to 0x00 after the transaction.

3. Write the address of the destination register, XORed with the protection password (0x7Dh) to the

PASSWORD register.

4. Write the same data as in step 2 to the password protected register. Again, the content of the PASSWORD

5. The register will be updated only if both data transfers 2, and 4 were valid, and the transferred data matched.

Note that no other I

C transaction is allowed between step 2 and 4 and the register will not be updated if any

other transaction occurs in-between. The cycle needs to be repeated for any other register that is Level2 write

protected.

RESET TO DEFAULT VALUES

All registers are reset to default values when one or more of the following conditions occur:

• The device transitions from ACTIVE state to SLEEP or OFF state.

• VBAT or VUSB is applied from power-less state (Power-On-Reset).

• Push-button input is pulled high for > 8 s.

• nRESET pin is pulled low.

• A fault occurs.

Product Folder Links: TPS65217A TPS65217B TPS65217C TPS65217D