Datasheet
OFF
ACTIVE
SLEEP
DCDCx = ON
WLED = ON
LDOx = ON
I2C = YES
PPATH = ON
CHRGR = ON
(1)
PGOOD = dependent on power rails
LDO_PGOOD = dependent on LDO1/2
DCDCx = OFF
(3)
WLED = OFF
LDO1 = ON
(5)
LDO2,3,4 = OFF
(3)
I2C = NO
PPATH = ON
(1)
CHRGR = ON
(1)
PGOOD = low
LDO_PGOOD = dependent on LDO1/2
Registers à default
POWER DOWN
NOTES:
Wakeup = V
USB
() || V
AC
() || PB (¯) || Returning from RESET state|| SEQUP bit= 1
FAULT = UVLO || OTS || PGOOD low || PWR_EN pin not asserted within5s of Wakeup event.
If no battery is present, OVP on AC input also leads to OFF mode. With battery present, device switches
automatically from AC to BAT if AC is>6.5V and back to AC when voltage recovers to<6.5V.
Device will remain in RESET state for at least 1s.
Sequencer is triggered when entering ACTIVE state.
(1)
Only if USB or AC supply is present
(3)
All rails not controlled by the sequencer maintain state when entering SLEEP mode, i.e.
they will not be powered down when
entering SLEEP mode.
(4)
Battery voltage always supplies the system(SYS pin)
(5)
LDO1/2 are not powered down when entering SLEEP mode if assigned to STROBE 14/15
or not under sequencer control. In
SLEEP mode, LDO1 and 2 can source 1
mA only.
By default LDO1 is asigned to STROBE
15 and LDO2 to
STROBE2.
(6)
LDO1 and/or LDO2 are powered up if assigned to to STROBE14/15. By default LDO1 is asigned to STROBE
15 and LDO2 to
STROBE2.
WAIT 1s
PWR_EN = low &
OFF = 1
Wakeup
Wakeup || PWER_EN = high
ANY STATE
DCDCx = OFF
WLED = OFF
LDOx = OFF
I2C = NO
PPATH = OFF
(4)
CHRGR = OFF
Registers à default
PGOOD = low
LDO_PGOOD = low
PB low for >8s ||
nRESET pin = low
RESET Registers à default
FAULT nRESET pin = low
AC power removed
USB power removed
Battery removed
WAIT 1s
DCDCx = OFF
WLED = OFF
LDOx = OFF
PPATH = OFF
(4)
CHRGR = OFF
I2C = NO
PGOOD = low
LDO_PGOOD = low
ANY STATE
FAULT
DCDCx = OFF
WLED = OFF
LDOx = OFF
PPATH = OFF
(4)
CHARGER= OFF
WAIT PWR_EN
WAIT 1s
PWR_EN = low &
OFF = 0
5s time-out
PWR_EN = high
DCDCx = OFF
(3)
WLED = OFF
LDO1 = ON
(5)
LDO2,3,4 = OFF
(3)
I2C = NO
PPATH = ON
(1)
CHRGR = ON
(1)
PGOOD = low
LDO_PGOOD = dependent on LDO1/2
DCDCx = OFF
WLED = OFF
LDO1 = ON
(6)
LDO2,3,4 = OFF
I2C = YES
PPATH = ON
CHRGR = ON
(1)
PGOOD = low
LDO_PGOOD = dependent on LDO1/2
TPS65217A, TPS65217B, TPS65217C, TPS65217D
SLVSB64F –NOVEMBER 2011–REVISED APRIL 2013
www.ti.com
Figure 1. Global State Diagram
16 Submit Documentation Feedback Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: TPS65217A TPS65217B TPS65217C TPS65217D