Datasheet
TPS65200
SLVSA48 –APRIL 2010
www.ti.com
INTERRUPT MASK REGISTER 3 (MASK3)
Address – 0x0Dh
DATA BIT D7 D6 D5 D4 D3 D2 D1 D0
BSTBUSOV BSTLOWV
FIELD NAME BSTOLM BSTBATOVM BST32SM Not used Not used Not used
M M
READ/WRITE R/W R/W R/W R/W R/W R/W R/W R/W
RESET VALUE 0 0 0 0 0 0 0 0
FIELD NAME BIT DEFINITION
(1)
Boost VBUS overvoltage interrupt mask
BSTBUSOVM 0 – Interrupt not masked
1 – Interrupt masked
Boost over load interrupt mask
BSTOLM 0 – Interrupt not masked
1 – Interrupt masked
Boost low battery voltage interrupt mask
BSTLOWVM 0 – Interrupt not masked
1 – Interrupt masked
Boost battery over voltage interrupt mask
BSTBATOVM 0 – Interrupt not masked
1 – Interrupt masked
Boost 32s time out interrupt mask
BST32SM 0 – Interrupt not masked
1 – Interrupt masked
Not used N/A
Not used N/A
Not used N/A
(1) Setting any of the interrupt mask bits does not disable protection circuits. When set, the respective fault will not be signaled on the INT
pin.
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