Datasheet
TPS65200
SLVSA48 –APRIL 2010
www.ti.com
CHARGER CONFIG REGISTER A (CONFIG_A)
Address – 0x01h
DATA BIT D7 D6 D5 D4 D3 D2 D1 D0
FIELD NAME LMTSEL VICHRG[3:0] VITERM[2:0]
READ/WRITE R/W R/W R/W R/W R/W R/W R/W R/W
RESET VALUE 0 0 0 0 0 0 0 1
FIELD NAME BIT DEFINITION
(1)
Input Current Limit selction
LMTSEL 0 – Input current limit is set to the higher of IIN_LIMIT[1:0] (CONFIG_B) and D+D- det. result
1 – IIN_LIMIT[1:0] (CONFIG_B) applied, D+D- detection result is ignored
Charge current sense voltage (current equivalent for 20 mΩ shunt)
0000 – 11 mV (550 mA)
0001 – 13 mV (650 mA)
0010 – 15 mV (75 mA)
0011 – 17 mV (850 mA)
0100 – 19 mV (950 mA)
0101 – 21 mV (105 mA)
VICHRG[3:0] 0101 – 21 mV (1050 mA)
0110 – 23 mV (1150 mA)
0111 – 25 mV (1250 mA)
1000 – 27 mV (1350 mA)
1001 – 29 mV (1450 mA)
1010 – 31 mV (1550 mA)
...
1111 – 31 mV (1550 mA)
Termination current sense voltage (current equivalent for 20 mΩ shunt)
000 – 1 mV (50 mA)
001 – 2 mV (100 mA)
010 – 3 mV (150 mA)
VITERM[2:0] 011 – 4 mV (200 mA)
100 – 5 mV (250 mA)
101 – 6 mV (300 mA)
110 – 7 mV (350 mA)
111 – 8 mV (400 mA)
(1) During charging the lower value of VMCHRG[3:0] (CONFIG_D register) and VICHRG[2:0] applies.
44 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS65200