Datasheet

NanoFree PACKAGE
(BOTTOM VIEW)
TI YMLLLLS
TPS65200
TI = TI LETTERS
YM = YEAR / MONTH DATE CODE
LLLL = LOT TRACE CODE
S = ASSEMBLY SITE CODE
O = Pin A1 (Filled Solid)
PACKAGE MARKING
(TOP VIEW)
SCL
OTG
CSIN
VIO
VSHNT
DP
SWC
PMID
VSHRT
STATPGND PGND
VDD
DMBOOT
VBUS
SWC
PMID
PGND
VBUS
SDA
VZERO
SWC
BAT
LDO
FB COMP
PGND SWL
VSYS
PMID INT CTRL
CSOUT
SGND
DGND
D
C
B
A
4321 5
E
F
6
DP – 31
DM – 32
SCL – 33
VIO – 34
SDA – 35
BOOT – 36
VBUS – 1
VBUS – 2
PMID – 3 PMID – 4
SWC – 5 SWC – 6
PGND – 7
16 – VSHRT
15 – STAT
14 – VDD
13 – OTG
12 – NC
11 – CSIN
10 – CSOUT
36-PIN 6mm x 6mm x 1mm QFN
TOP VIEW
PGND – 8
BAT – 9
18 – DGND
17 – SGND
22 – VSYS 21 – VSHNT 20 – NC 19 – VZERO 27 – SWL 26 – COMP 25 – CTRL 24 – LDO
23 – INT
NC – 28
FB – 29
PGND – 30
TPS65200
SLVSA48 –APRIL 2010 www.ti.com
PIN CONFIGURATION
4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS65200