Datasheet

G3 G2 A1 A0 R/nW ACKStart G 1 G0 A2 S7 S6 S2 S1S5 S4 S3 S0 ACK D7 D6 D2 D1D5 D4 D3 D0 ACK Stop

Slave Address + R/nW Sub Address Data

START CONDITION

. . .

ACKNOWLEDGE STOP CONDITION

SCL

SDA

1 2 3 4 5 6 7 8 9

. . .

TPS65200

SLVSA48 –APRIL 2010

www.ti.com

C BUS OPERATION

The TPS65200 hosts a slave I

C interface that supports data rates up to 400 kbit/s and auto-increment

addressing and is compliant to I

C standard 3.0.

Figure 56. Subaddress in I

C Transmission

Start – Start Condition ACK – Acknowledge

G(3:0) – Group ID: Address fixed at 1101 S(7:0) – Subaddress: defined per register map

A(2:0) – Device Address: Address fixed at 010 D(7:0) – Data; Data to be loaded into the device

R/nW – Read / not Write Select Bit Stop – Stop Condition

The I

C bus is a communications link between a controller and a series of slave terminals. The link is established

using a two-wired bus consisting of a serial clock signal (SCL) and a serial data signal (SDA). The serial clock is

sourced from the controller in all cases where the serial data line is bi-directional for data communication

between the controller and the slave terminals. Each device has an open drain output to transmit data on the

serial data line. An external pull-up resistor must be placed on the serial data line to pull the drain output high

during data transmission.

Data transmission is initiated with a start bit from the controller as shown in Figure 57. The start condition is

recognized when the SDA line transitions from high to low during the high portion of the SCL signal. Upon

reception of a start bit, the device will receive serial data on the SDA input and check for valid address and

control information. If the appropriate group and address bits are set for the device, then the device will issue an

acknowledge pulse and prepare the receive subaddress data. Subaddress data is decoded and responded to as

per the Register Map section of this document. Data transmission is completed by either the reception of a stop

condition or the reception of the data word sent to the device. A stop condition is recognized as a low to high

transition of the SDA input during the high portion of the SCL signal. All other transitions of the SDA line must

occur during the low portion of the SCL signal. An acknowledge is issued after the reception of valid address,

sub-address and data words. The I

C interface will auto-sequence through register addresses, so that multiple

data words can be sent for a given I

C transmission.

Figure 57. I

C Start/Stop/Acknowledge Protocol

Product Folder Link(s): TPS65200