Datasheet

V
CSOUT
< V
SHORT
?
Regulate
Input Current ,
Change Current or
Voltage
-----------------
CHSTAT [2:0]=001
V
BUS
< V
IN(MIN)
?
V
CSOUT
< V
SHORT
?
TERM _EN = 1 &
V
CSOUT
> V
OREG
– V
RCH
&
ITERM detected
NO
Enable I
SHORT
-----------------
CHSTAT [2:0]=100
V
BUS
< V
IN(MIN )
YES
YES
Turn off Charge
-----------------
CHTERMI=1
YES
NO
NO
YES
YES
NO
NO
NO
ADAPTOR
DETECTION
CHARGE DONE
CHARGE DONE
DELAY T
INT
Turn off Charge
TPS65200
SLVSA48 –APRIL 2010 www.ti.com
Figure 47. Detailed Charging Flow Chart
Input Current Limiting and D+/D- Detection
By default the VBUS input current limit is set to 500 mA. When VBUS is asserted the TPS65200 performs a
charger source identification to determine if it is connected to a USB port or dedicated charger. This detection is
performed 200 ms after VBUS is asserted to ensure the USB plug has been fully inserted before identification is
performed. If a dedicated charger is detected the input current limit is increased to 975 mA, other wise the
current limit remains at 500 mA, unless changed by the user.
Automatic detection is performed only if VIO is below 0.6 V to avoid interfering with the USB transceiver which
may also perform D+/D- detection when the system is running normally. However, D+/D- can be initiated at any
time by the host by setting the DPDM_EN bit in the CONTROL register to 1. After detection is complete the
DPDM_EN bit is automatically reset to 0 and the detection circuitry is disconnected from the DP DM pins to avoid
interference with USB data transfer.
The input current limit can also be set through the I
2
C interface to 100 mA, 500 mA, 975 mA, or no limit by
writing to the CONFIG_B register. The effective current limit will be the higher of the D+D- detection result and
the IIN_LIMIT[1:0] setting in CONFIG_A register. Whenever VBUS drops below the UVLO threshold
IIN_LIMIT[1:0] is reset to 100-mA setting to avoid excessive current draw from an unknown USB port.
Once the input current reaches the input current limiting threshold, the charge current is reduced to keep the
input current from exceeding the programmed threshold. The host can choose to ignore the D+D- detection
result by setting the LMTSEL bit of the CONFIG_A register to 1.
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