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TPS65200

www.ti.com

SLVSA48 –APRIL 2010

LI+ BATTERY CHARGER WITH WLED DRIVER AND CURRENT SHUNT MONITOR

Check for Samples: TPS65200

FEATURES

• Automatic High Impedance Mode for Low

Power Consumption

• Battery Switching Charger, WLED Driver, and

Current Shunt Monitor in a Single Package • Safety Timer with Reset Control

BATTERY CHARGER • Reverse Leakage Protection Prevents Battery

Drainage

• Charges Faster Than Linear Chargers

• Thermal Regulation and Protection

• High-Accuracy Voltage and Current Regulation

• Input/Output Over Voltage Protection

– Input Current Regulation Accuracy: ±5%

(100 mA, 500 mA) • Status Output for Charging and Faults

– Charge Voltage Regulation Accuracy: • USB Friendly Boot-Up Sequence

±0.5% (25°C),

• Automatic Charging

±1% (0 - 125°C)

• Boost Mode Operation for USB OTG

– Charge Current Regulation Accuracy: ±5%

– Input Voltage Range (VSYS): 2.5 V to 4.5 V

• Input Voltage Based Dynamic Power

– Output Voltage for VBUS: 5 V

Management

WLED DRIVER

• Bad Adaptor Detection and Rejection

• 35-V Open LED Protection for up to 8 LEDs

• Safety Limit Register for Maximum Charge

• 200-mV Reference Voltage With ±2% Accuracy

Voltage and Current Limiting

• Built-In Soft Start for WLED Boost

• High-Efficiency Mini-USB/AC Battery Charger

• Up to 90% Efficiency

for Single-Cell Li-Ion and Li-Polymer Battery

Packs • 2.5-V - 4.5-V Battery Voltage Range

(Charger and Current Shunt Monitor)

• 20-V Absolute Maximum Input Voltage Rating

CURRENT SHUNT MONITOR

• 6.0-V Maximum Operating Input Voltage

• Fixed Gain of 25 V/V

• Built-In Input Current Sensing and Limiting

• Input Referred Offset Voltage Less Than

• Integrated Power FETs for Up to 1.25-A Charge

±40 µV Typical Enables Use of Shunt Resistors

Rate

as Low as 20 mΩ

• Programmable Charge Parameters through I

• Buffered Reference Voltage

Interface (up to 400 Kbps):

• 2.5-V - 4.5-V Battery Voltage Range

– Input Current

(Charger and Current Shunt monitor)

– Fast-Charge/Termination Current

PACKAGE

– Charge Voltage (3.5 V - 4.44 V)

• 36-Ball, 0.4-mm Pitch DSBGA Package

– Safety Timer

• 6-mm x 6-mm, 0.5-mm Pitch QFN

– Termination Enable

• Synchronous Fixed-Frequency PWM

APPLICATIONS

Controller Operating at 3 MHz With 0% to

• Mobile Phones and Smart Phones

99.5% Duty Cycle

• MP3 Players

• Portable Navigation Devices

• Handheld Devices

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (60 pages)

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TPS65200 www.ti.com SLVSA48 – APRIL 2010 LI+ BATTERY CHARGER WITH WLED DRIVER AND CURRENT SHUNT MONITOR Check for Samples: TPS65200 FEATURES 1 • • • • • • • • • • • • • Battery Switching Charger, WLED Driver, and Current Shunt Monitor in a Single Package BATTERY CHARGER Charges Faster Than Linear Chargers High-Accuracy Voltage and Current Regulation – Input Current Regulation Accuracy: ±5% (100 mA, 500 mA) – Charge Voltage Regulation Accuracy: ±0.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com DESCRIPTION The TPS65200 integrates a high-efficiency, USB-friendly switch-mode charger with OTG support for single-cell Li-ion and Li-polymer batteries, D+D- detection, a 50-mA fixed-voltage LDO, a high-efficiency WLED boost converter, and high-accuracy current-shunt monitor into a single chip.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 FUNCTIONAL BLOCK DIAGRAM VSYS CTRL from uC TSD DGND SGND 10mH SWL BG/BIAS WLED Driver 0.47 F LDO to load 220nF COMP LDO 4.9V, 60mA PGND UVLO FB PMID 1mF VBUS from USB connector R SET 10W 1m F Q1 1mF VSHRT BOOT 10mA 10nF System Load 1m H R SNS SWC VIO Single cell Li+ Battery Q2 VIO 20mW 10mF 0.6 V Q3 10mF PGND DP DM from USB port from USB port VIO D+/Ddetection Switching Charger VIO from /to uC 0.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 TERMINAL NAME NO. I/O DESCRIPTION (DSBGA) (QFN) A2 10 I E1, E2 1, 2 I/O Charger input voltage. Bypass it with a 1-mF ceramic capacitor from VBUS to PGND. It also provides power to the load in boost mode. BAT A1 9 O Output of the linear charger and battery voltage sense. Connect the battery from this pin to ground.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) Supply voltage range (with respect to PGND) Input/Output voltage range (with respect to PGND) (1) (2) VALUE UNIT VBUS -2 to 20 V SDA, SCL, DM, DP, SWL, VZERO, VSHRT, CSIN, CSOUT, CSOT, LDO, INT, OTG, VSYS, VSHNT, VDD, VIO, BAT, CTRL -0.3 to 7 PMID, STAT -0.3 to 20 VDD SWC, BOOT -0.7 to 20 FB,COMP -0.3 to 3 SWL -0.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 ELECTRICAL CHARACTERISTICS VBAT = 3.6 V ±5%, TJ = 27ºC (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX 2 10 UNIT INPUT CURRENTS Charger HiZ mode WLED disabled Shunt monitor disabled IDISCHARGE Battery discharge current in high Impedance mode (CSIN, CSOUT,SWC, SWL, BAT, VSYS pins) 0°C < TJ < 85°C, VBAT = 4.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VBAT = 3.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 ELECTRICAL CHARACTERISTICS (continued) VBAT = 3.6 V ±5%, TJ = 27ºC (unless otherwise noted) PARAMETER VBATMIN Minimum battery voltage for boost (VSYS pin) Boost output resistance at high impedance mode (From VBUS to PGND) TEST CONDITIONS MIN TYP During boosting 2.5 Before boost starts 2.9 HZ_MODE = 1 500 Input VBUSOVP threshold voltage Threshold over VBUS to turn off converter during charge 6.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VBAT = 3.6 V ±5%, TJ = 27ºC (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX Under Voltage Lock Out (VSYS pin) VSYS falling 2.2 2.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 ELECTRICAL CHARACTERISTICS (continued) VBAT = 3.6 V ±5%, TJ = 27ºC (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LOGIC LEVELS AND TIMING CHARTERISTICS (SCL, SDA, CTRL, INT) Output low threshold level VOL IO = 3 mA, sink current (SDA, INT) 0.4 Input low threshold level 0.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com TYPICAL CHARACTERISTICS TA = 25°C, unless otherwise specified. Switching Charger I2C CONTROLLED START UP VBUS = 5.5 V, VBAT = 3.3 V, IIN_limit = 975 mA, ICHARGE = 950 mA 12 IIN I2C CONTROLLED START UP VBUS = 5.5 V, VBAT = 3.3 V, - limit = 975 mA, ICHARGE = 950 mA Figure 1. Figure 2. PWM CHARGE OPERATION VBUS = 5 V, ICHARGE = 150 mA PWM CHARGE OPERATION VBUS = 5 V, ICHARGE = 150 mA Figure 3. Figure 4.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 TYPICAL CHARACTERISTICS (continued) TA = 25°C, unless otherwise specified. TRANSIENT RESPONSE 0-A - 1-A Transient on VSYS, VBUS = 5.5 V, VBAT = 3.2 V, VOREG = 4 V, ICHARGE = 950 mA, IIN_limit = 975 mA TRANSIENT RESPONSE 0-A - 1-A Transient on VSYS, VBUS = 5.5 V, VBAT = 3.2 V, VOREG = 4 V, ICHARGE = 950 mA, IIN_limit = 975 mA Figure 5. Figure 6. TRANSIENT RESPONSE 0-A - 1-A Transient on VSYS, VBUS = 5.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) TA = 25°C, unless otherwise specified. TRANSIENT RESPONSE 0-A - 1-A Transient on VSYS, VBUS = 5.5 V, No Battery, VOREG = 4 V, ICHARGE = 950 mA, IIN_limit = 975 mA TRANSIENT RESPONSE 0-A - 1-A Transient on VSYS, VBUS = 5.5 V, No Battery, VOREG = 4 V, ICHARGE = 950 mA, IIN_limit = 975 mA Figure 9. Figure 10. BAD ADAPTOR DETECTION VBUS = 5.5 V, RIN = 60 Ω, VBAT = 3 V (#165) CHARGING CURVE 1500 mAh Li-ion, 5.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 TYPICAL CHARACTERISTICS (continued) TA = 25°C, unless otherwise specified. PRE-CHARGE CURVE ICHARGE = 950 mA, IIN_limit = 975 mA, VSHORT = 2.8 V EFFECTIVE DROPOUT VOLTAGE 1000 700 4.5 Charging Current 900 4.25 4 3.75 Battery Voltage 600 3.5 VSHORT set to 2.8V 500 3.25 400 3 300 2.75 200 (V B U S -V B A T ) [m V ] 700 B a tte ry V o l ta g e [V ] C h a r g i n g C u rr e n t [m A ] 600 800 400 300 200 2.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) TA = 25°C, unless otherwise specified. OTG Boost 16 START UP VBAT = 3.8 V, ILOAD = 200 mA SHUTDOWN VBAT = 3.8 V, ILOAD = 200 mA Figure 16. Figure 17. PWM BOOST OPERATION VBAT = 3.8 V, ILOAD = 1 mA PWM BOOST OPERATION VBAT = 3.8 V, ILOAD = 30 mA Figure 18. Figure 19.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 TYPICAL CHARACTERISTICS (continued) TA = 25°C, unless otherwise specified. PWM BOOST OPERATION VBAT = 3.8 V, ILOAD = 200 mA TRANSIENT RESPONSE VBAT = 3.8 V, ILOAD = 5 mA - 200 mA Figure 20. Figure 21. I2C CONTROLLED VOLTAGE STEP VBAT = 3.8 V, ILOAD = 200 mA I2C CONTROLLED VOLTAGE STEP VBAT = 3.8 V, ILOAD = 200 mA Figure 22. Figure 23.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) TA = 25°C, unless otherwise specified. LDO 18 TURN-ON DELAY TURN-OFF DELAY Figure 24. Figure 25. START UP Charger = ON at 950 mA, VBUS = 5.5 V SHUTDOWN Charger = ON at 950 mA, VBUS = 5.5 V Figure 26. Figure 27.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 TYPICAL CHARACTERISTICS (continued) TA = 25°C, unless otherwise specified. START UP 50 mA Load, Charger = ON at 950 mA, VBUS = 5.5 V SHUTDOWN 50 mA Load, Charger = ON at 950 mA, VBUS = 5.5 V Figure 28. Figure 29. TRANSIENT RESPONSE Charger OFF, ILOAD = 5 mA to 50 mA, VBUS = 5.5 V OTG BOOST EFFICIENCY VBUS = 5.5 V 100% VBAT=4.2V 95% VBAT=3.6V E f fici en cy 90% 85% VBAT=2.9V 80% 75% 70% 65% 60% 0 0.05 0.1 0.15 0.2 0.25 0.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) TA = 25°C, unless otherwise specified. WLED Boost 20 START UP VBAT = 3.8 V, VFB = 200 mV, 7 LEDs SHUTDOWN VBAT = 3.8 V, VFB = 200 mV, 7 LEDs Figure 32. Figure 33. PWM OPERATION VBAT = 4.2 V, VFB = 200 mV, 7 LEDs PWM OPERATION VBAT = 4.2 V, VFB = 20 mV, 7 LEDs Figure 34. Figure 35.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 TYPICAL CHARACTERISTICS (continued) TA = 25°C, unless otherwise specified. PWM OPERATION VBAT = 3 V, VFB = 200 mV, 7 LEDs PWM OPERATION VBAT = 3 V, VFB = 20 mV, 7 LEDs Figure 36. Figure 37. PWM DIMMING 50% Duty Cycle, VBAT = 3.8 V, VFB = 200 mV, 7 LEDs OPEN LED PROTECTION VBAT = 3.8 V, VFB = 200 mV, 7 LEDs (#162) Figure 38. Figure 39.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com TYPICAL CHARACTERISTICS (continued) TA = 25°C, unless otherwise specified. EFFICIENCY VBAT = 3.3 V EFFICIENCY 6 LEDs 90% 90% 6 LEDs 4 LEDs VBAT=4.2V 85% 85% 80% 80% VBAT=2.8V 10 LEDs E f fici en cy E f fici en cy 8 LEDs 75% 70% 70% 65% 65% 60% 60% 55% 55% 50% VBAT=3.6V 75% 50% 0 5 10 15 20 0 5 10 WLED current [mA] 15 20 WLED current [mA] Figure 40. Figure 41. WLED DIMMING LINEARITY VBAT = 3.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 GLOBAL STATE DIAGRAM During normal operation TPS65200 is either in STANDBY mode or ACTIVE mode, depending on user inputs. In STANDBY mode most functions are turned off to conserve power but the IC can still be accessed through I2C bus and the current shunt monitor can be turned on and off. The bias system and main oscillator are turned off in STANDBY mode. The device enters ACTIVE mode whenever VBUS is asserted or the WLED driver is turned on.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com CTRL = L means CTRL pin is low for>2.5ms || = OR & = AND (?) = rising edge (?) = falling edge POWER DOWN CTRL = L & WLED_EN=0 DISABLED WLED_EN = 0 & CTRL = L FAULT BOOST is turned off FAULT WLED_EN = 1 || CTRL = H WLED BOOST ON Figure 44. State Diagram for WLED Driver Under Voltage Lockout An under voltage lockout circuit prevents operation of the WLED driver at input voltages (CSOUT pin) below 2.2 V.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 Current Program The FB voltage is regulated to a low 200-mV reference voltage. The LED current is programmed externally using a current-sense resistor in series with the LED string. The value of the RSET is calculated using Equation 1. VFB ILED = ¾ RSET (1) Where: 1. ILED = output current of LEDs 2. VFB = regulated voltage of FB 3. RSET = current sense resistor The output current tolerance depends on the FB accuracy and the current sensor resistor accuracy.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com 3. VOUT = Output voltage of the boost converter. It is equal to the sum of VFB and the voltage drop across LEDs. VIN · D IPP = ¾ L · fS (4) Where: 1. IPP = inductor peak to peak ripple 2. L = inductor value 3. fs = switching frequency ( ) IPP VIN · ILIM - ¾ ·h 2 IOUT(MAX) = ¾ VOUT (5) Where: 1. IOUT(MAX) = maximum output current of the boost converter 2. ILIM = over current limit 3.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com ADAPTOR DETECTION CHARGE DONE NO Regulate Input Current , Change Current or Voltage ----------------CHSTAT [2:0]=001 NO V CSOUT < VSHORT ? YES Enable ISHORT ----------------CHSTAT [2:0]=100 V BUS < V IN(MIN ) NO VCSOUT < V SHORT ? YES YES NO NO VBUS < V IN(MIN) ? YES Turn off Charge NO DELAY T INT TERM _EN = 1 & V CSOUT > VOREG – V RCH & ITERM detected Turn off Charge ----------------CHTERMI=1 YES CHARGE DONE Figure 47.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 DISABLED VBUS > VUVLO ,VBUS ILIMIT = 500mA DPDM_D = 0 Delay 200ms VIO < 0.6V? NO YES D+ / D- Detection Circuit Turn on VDP _SRC , IDM _SINK , DP_SW, and DM_SW VDP_ SRC Delay 40ms DPDM_EN=0 Delay 80ms V BUS
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com VBUS 30ms deglitch VIN(MIN) HiZ ISHORT Adaptor detection control Delay 10ms Enable Adaptor Detection ----------------Enable Input current sink Start 30ms timer NO V BUS > VIN(MIN) ? NO Figure 49. Bad Adaptor Detection Circuit YES 30ms timer expired? YES Bad Adaptor Detected ----------------Disable Input current sink CHBADI = 1 Good Adaptor Detected ----------------Disable Input current sink Enable VIN based DPM Delay TINT CHARGE Figure 50.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 VDD VBAT 10mA R R + VSHRT VBAT >VSHRT + 90% VDD 1 .05 V VSHORT can be adjusted by an external resistor. Note that the VSHRT pin voltage equals half VSHORT threshold. When VSHRT pin is left floating or is tied to VDD, an internal reference of 1.05 V is used resulting in a 2.1-V pre-charge to fast-charge transition threshold. Figure 51.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com Precharge Phase Current Regulation Phase Voltage Regulation Phase Regulation voltage Charge Voltage V SHORT Charge Current Termination ISHORT Precharge (Linear Charge) Fast Charge (PWM Charge) The charging current during current regulation phase decreases as battery voltage increases. This mode ensures fastest charging of the battery without exceeding the adaptor current limit. Figure 53.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 The TPS65200 monitors the charging current during the voltage regulation phase. Once the termination threshold, ITERM, is detected and the battery voltage is above the recharge threshold, the TPS65200 terminates charge. The termination current level is programmable and charge termination is disabled by default. To enable the charge current termination, the host can set the charge termination bit TERM_EN of CONFIG_C register to 1. Refer to I2C section for details.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com Reset and start 32min timer CH_EN[1:0] != 00 DISABLED CH_EN[1:0] = 00 Any state 32s timer expired? YES NO CH_EN [1:0] = 10? YES Disable boost ----------------CH_EN[1:0] = 00 BST32SI =1 YES Disable charger ----------------CH_EN[1:0] = 00 CH32MI = 1 NO 32m timer expired? NO YES CHSTAT[2:0] = 010? (Charge done) NO YES Any I2C action? NO Figure 54.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 Input Voltage Based Dynamic Power Management (CHDPMI) During normal charging process, if the input power source is not able to support the charging current, VBUS voltage will decease. Once VVBUS drops to VIN_LOW (default 4.36 V), the charge current will taper down to prevent further drop of VBUS. This feature makes the IC compatible with adaptors with different current capabilities.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com Boost Start Up To prevent the inductor saturation and limit the inrush current, a soft-start control is applied during the boost start up. PFM Mode at Light Load In boost mode, TPS65200 will operate in pulse skipping mode (PFM mode) to reduce the power loss and improve the converter efficiency at light load condition.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 || = OR & = AND (?) = rising edge (?) = falling edge POWER DOWN LDO OFF LDO_EN = 0 LDO_EN = 1 LDO ON Figure 55. State Diagram for the HV LDO INTERRUPT PIN The interrupt pin is used to signal any fault condition to the host processor. Whenever a fault occurs in the IC the corresponding fault bit is set in the INT1, INT2, or INT3 register, and the open-drain output is pulled low.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com I2C BUS OPERATION The TPS65200 hosts a slave I2C interface that supports data rates up to 400 kbit/s and auto-increment addressing and is compliant to I2C standard 3.0. Slave Address + R/nW Start G3 G2 G1 G0 A2 A1 Sub Address A0 R/nW ACK S7 S6 S5 S4 S3 S2 Data S1 S0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK Stop Figure 56.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 t LOW t r( t H( STA) tF SCL t H(STA) t H(DAT) t HIGH t S(DAT) tS(STA) t S(STO) SDA t (BUF) P S S P Figure 58. I2C Data Transmission Timing DATA TRANSMISSION TIMING VBAT = 3.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com DATA TRANSMISSION TIMING (continued) VBAT = 3.6 ±5%, TA = 25 ºC, CL = 100 pF (unless otherwise noted) PARAMETER tf(SDA) Fall time of SDA Signal TEST CONDITIONS MIN TYP MAX SCL = 100 KHz 300 SCL = 400 kHz 300 UNIT ns PCB LAYOUT CONSIDERATIONS As for all switching power supplies, the layout is an important step in the design, especially at high peak currents and switching frequencies.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 Place C9 and C10 (VSYS) as close to L2 as possible with short connection to ground. C4 should be placed close to the IC.Trace current is low <1mA.) Place C8 as close to the IC as possible. Max trace current is 60mA. Place C2 and C3 as close to the IC as possible. Connection C2[A3] and C3-[A2] must not be in any current path and should be kept as short as possible. Traces should connect directly to sense resistor R5.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com Table 1.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com CHARGER CONFIG REGISTER A (CONFIG_A) Address – 0x01h DATA BIT D7 FIELD NAME LMTSEL D6 D5 D4 D3 D2 READ/WRITE R/W R/W R/W R/W R/W R/W R/W R/W RESET VALUE 0 0 0 0 0 0 0 1 VICHRG[3:0] D1 D0 VITERM[2:0] BIT DEFINITION (1) FIELD NAME Input Current Limit selction LMTSEL 0 – Input current limit is set to the higher of IIN_LIMIT[1:0] (CONFIG_B) and D+D- det.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 CHARGER CONFIG REGISTER B (CONFIG_B) Address – 0x02h DATA BIT D7 FIELD NAME D6 D5 D4 D3 IIN_LIMIT[1:0] D2 D1 D0 VOREG[5:0] READ/WRITE R/W R/W R/W R/W R/W R/W R/W R/W RESET VALUE 0 0 0 1 1 0 0 1 BIT DEFINITION (1) FIELD NAME Input current limit setting 00 – 100 mA IIN_LIMIT[1:0] 01 – 500 mA 10 – 975 mA 11 – No input current limit Battery regulation voltage / boost output voltage 00 0000 – 3.50 V / 4.425 V 00 0001 – 3.52 V / 4.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com CHARGER CONFIG REGISTER C (CONFIG_C) Address – 0x03h DATA BIT D7 D6 D5 D4 D3 FIELD NAME VS_REF OTG_PL OTG_EN TERM_EN LOW_CHG READ/WRITE R/W R/W R/W R/W R/W R/W R/W R/W RESET VALUE 1 0 0 0 1 0 1 0 FIELD NAME D2 D1 D0 VSREG[2:0] BIT DEFINITION VSHORT reference select VS_REF 0 – Internal (2.1 V) reference 1 – Current source on VSHRT pin is enabled. Pin voltage is used as 0.5 x VSHORT threshold.
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TPS65200 SLVSA48 – APRIL 2010 www.ti.com WLED CONTROL REGISTER (WLED) Address – 0x05h DATA BIT D7 D6 D5 FIELD NAME Not used Not used Not used READ/WRITE R R R R/W R/W RESET VALUE 0 0 0 1 1 FIELD NAME D4 D3 D2 D1 D0 R/W R/W R/W 1 1 1 VFB[4:0] BIT DEFINITION Not used N/A Not used N/A Not used N/A WLED feedback voltage 0 0000 – 0% 0 0001 – 2.5% 0 0010 – 4% 0 0011 – 5.5% 0 0100 – 7.5% 0 0101 – 8.5% 0 0110 – 10% 0 0111 – 11.5% 0 1000 – 13% 0 1001 – 14.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 INTERRUPT REGISTER 2 (INT2) Address – 0x09h DATA BIT D7 D6 D5 D4 D3 D2 D1 D0 CHTERMI CHRCHGI CH32MI CHTREGI CHDPMI FIELD NAME CHRVPI CHBADI CHBATOV I READ/WRITE R R R R R R R R RESET VALUE 0 0 0 0 0 0 0 0 BIT DEFINITION (1) FIELD NAME CHRVPI Charger fault. Reverse protection (VVBUS > VIN(MIN) and VVBUS < VCSOUT+VREV (fault) CHBADI Charger fault. Bad adaptor (VBUS < VIN(MIN)) CHBATOVI Charger fault.
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TPS65200 www.ti.com SLVSA48 – APRIL 2010 CHIP ID REGISTER (CHIPID) Address – 0x0Eh DATA BIT D7 D6 D5 D4 D3 D2 D0 VENDOR[1:0] READ/WRITE R R R R R R R R RESET VALUE 0 0 0 0 0 0 0 1 (1) (1) CHIP[2:0] D1 FIELD NAME REV[2:0] Device dependent. FIELD NAME VENDOR[1:0] BIT DEFINITION Vendor code 00 – default 00 – Default Chip ID 000 – TPS65200 CHIP[2:0] 001 – Future use ... 111 – Future use Revision code 000 – Revision 1.0 REV[2:0] 001 – Revision 1.1 010 – Future use ...
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE MATERIALS INFORMATION www.ti.com 28-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) TPS65200YFFR DSBGA YFF 36 3000 180.0 8.4 TPS65200YFFT DSBGA YFF 36 250 180.0 8.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 2.76 3.02 0.83 4.0 8.0 Q2 2.76 3.02 0.83 4.0 8.
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PACKAGE MATERIALS INFORMATION www.ti.com 28-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS65200YFFR DSBGA YFF 36 3000 182.0 182.0 17.0 TPS65200YFFT DSBGA YFF 36 250 182.0 182.0 17.
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