Datasheet

PRODUCTPREVIEW
TPS65186
www.ti.com SLVSB04 –JULY 2011
DATA TRANSMISSION TIMING
V
BAT
= 3.6 V ±5%, T
A
= 25ºC, C
L
= 100 pF (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
(SCL)
Serial clock frequency 100 400 KHz
SCL = 100 KHz 4 µs
Hold time (repeated) START condition. After this
t
HD;STA
period, the first clock pulse is generated.
SCL = 400 KHz 600 ns
SCL = 100 KHz 4.7
t
LOW
LOW period of the SCL clock µs
SCL = 400 KHz 1.3
SCL = 100 KHz 4 µs
t
HIGH
HIGH period of the SCL clock
SCL = 400 KHz 600 ns
SCL = 100 KHz 4.7 µs
t
SU;STA
Set-up time for a repeated START condition
SCL = 400 KHz 600 ns
SCL = 100 KHz 0 3.45 µs
t
HD;DAT
Data hold time
SCL = 400 KHz 0 900 ns
SCL = 100 KHz 250
t
SU;DAT
Data set-up time ns
SCL = 400 KHz 100
SCL = 100 KHz 1000
t
r
Rise time of both SDA and SCL signals ns
SCL = 400 KHz 300
SCL = 100 KHz 300
t
f
Fall time of both SDA and SCL signals ns
SCL = 400 KHz 300
SCL = 100 KHz 4 µs
t
SU;STO
Set-up time for STOP condition
SCL = 400 KHz 600 ns
SCL = 100 KHz 4.7
t
BUF
Bus Free Time Between Stop and Start Condition µs
SCL = 400 KHz 1.3
SCL = 100 KHz n/a n/a
Pulse width of spikes which mst be suppressed
t
SP
ns
by the input filter
SCL = 400 KHz 0 50
SCL = 100 KHz 400
C
b
Capacitive load for each bus line pF
SCL = 400 KHz 400
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