Datasheet

TPS65161
TPS65161A, TPS65161B
SLVS617E –APRIL 2006–REVISED MARCH 2013 www.ti.com
ELECTRICAL CHARACTERISTICS (continued)
V
IN
= 12 V, SUP = V
IN
, EN1 = EN2 = V
IN
, V
S
= 15 V, V
(LOGIC)
= 3.3 V, T
A
= –40°C to 85°C, typical values are at T
A
= 25°C
(unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
CONTROL AND SOFT START DLY1, DLY2, SS
I
(DLY1)
Delay1 charge current 3.3 4.8 6.2 μA
I
(DLY2)
Delay2 charge current V
(THRESHOLD)
= 1.213 V 3.3 4.8 6.2 μA
I
SS
SS charge current 6 9 12 μA
INTERNAL OSCILLATOR
FREQ = high 600 750 900
f
OSC
Oscillator frequency kHz
FREQ = low 400 500 600
BOOST CONVERTER (V
S
)
V
S
Output voltage range
(1)
19 V
V
(FB)
Feedback regulation voltage 1.136 1.146 1.156 V
I
(FB)
Feedback input bias current 10 100 nA
N-MOSFET on-resistance (Q1) I
(SW)
= 500 mA 100 185 mΩ
r
DS(on)
P-MOSFET on-resistance (Q2) I
(SW)
= 200 mA 10 16 Ω
I
MAX
Maximum P-MOSFET peak switch current 1 A
I
LIM
N-MOSFET switch current limit (Q1) TPS65161 2.8 3.5 4.2 A
I
LIM
N-MOSFET switch current limit (Q1) TPS65161A 3.7 4.6 5.5 A
I
lkg
Switch leakage current V
(SW)
= 15 V 1 10 μA
OVP Overvoltage protection V
OUT
rising 19.5 20 21 V
10.6 V ≤ V
IN
≤ 11.6 V
Line regulation 0.0008 %/V
at 1 mA
Load regulation 0.03 %/A
GATE DRIVE (GD)
V
(GD)
Gate drive threshold
(2)
V
(FB)
rising V
S
-12% V
S
-8% V
S
-4% V
V
OL
GD output low voltage I
(sink)
= 500 μA 0.3 V
GD output leakage current V
(GD)
= 20 V 0.05 1 μA
STEP-DOWN CONVERTER (V
(LOGIC)
)
V
(LOGIC)
Output voltage range 1.8 5 V
V
(FBB)
Feedback regulation voltage 1.195 1.213 1.231 V
I
(FBB)
Feedback input bias current 10 100 nA
r
DS(on)
N-MOSFET on-resistance (Q5) I
(SW)
= 500 mA 175 300 mΩ
I
LIM
N-MOSFET switch current limit (Q5) 2.5 3.2 3.9 A
I
lkg
Switch leakage current V
(SW)
= 0 V 1 10 μA
10.6 V ≤ V
IN
≤ 11.6 V
Line regulation 0.0018 %/V
at 1 mA
Load regulation 0.037 %/A
(1) The maximum output voltage is limited by the overvoltage protection threshold and not be the maximum switch voltage rating.
(2) The GD signal is latched low when the main boost converter output V
S
is within regulation. The GD signal is reset when the input
voltage or enable of the boost converter is cycled low.
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