Datasheet

EN2
EN1
GD
V
(LOGIC)
V
GL
DLY1
V
S
V
GH
DLY2
V
IN
V
IN
V ,
S
V
GH
FallTimeDependsonLoad
CurrentandFeedbackResistor
R3 + R4
|V
out
|
V
REF
+ R4
|V
out
|
1.213
V
out
+ *V
REF
R3
R4
+ * 1.213 V
R3
R4
TPS65161
TPS65161A, TPS65161B
SLVS617E –APRIL 2006–REVISED MARCH 2013 www.ti.com
Negative Charge Pump
The negative charge pump provides a regulated output voltage set by the external resistor divider. The negative
charge pump operates similar to the positive charge pump with the difference that it runs from the input voltage
V
IN
. The negative charge pump driver inverts the input voltage. The maximum negative output voltage is V
GL
=
(–V
IN
) + V
drop
. V
drop
is the voltage drop across the external diodes and internal charge-pump MOSFETs. In case
V
GL
needs to be lower than –V
IN
, an additional charge-pump stage needs to be added.
Setting the output voltage:
The lower feedback resistor value, R4, should be in a range between 40 kΩ to 120 kΩ or the overall feedback
resistance should be within 500 kΩ to 1 MΩ. Smaller values load the reference too heavily, and larger values
may cause stability problems. The negative charge pump requires two external Schottky diodes. The peak
current rating of the Schottky diode has to be twice the load current of the output. For a 20-mA output current,
the dual-Schottky diode BAV99 is a good choice.
Power-On Sequencing (EN1, EN2, DLY1, DLY2)
The TPS65161 has an adjustable power-on sequencing set by the capacitors connected to DLY1 and DLY2 and
controlled by EN1 and EN2. Pulling EN1 high enables the step-down converter and then the negative charge-
pump driver. DLY1 sets the delay time between the step-down converter and negative charge-pump driver. EN2
enables the boost converter and positive charge-pump driver at the same time. DLY2 sets the delay time
between the step-down converter V
(LOGIC)
and the boost converter V
S
. This is especially useful to adjust the delay
when EN2 is always connected to V
IN
. If EN2 goes high after the step-down converter is already enabled, then
the delay DLY2 starts when EN2 goes high. See Figure 17 and Figure 18.
Figure 17. Power-On Sequencing With EN2 Always High (EN2 = V
IN
)
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