Datasheet

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FB1
FB4
BASE
VIN
SW
SW
PGND
PGND
SUP
PG
GND
FB3
EN
ENR
COMP
FB2
REF
GND
DRV
C1−
C1+
C2−/MODE
C2+
OUT3
Thermal PAD*
FB2 REF GND DRV C1− C1+
1
2
3
4
5
6
18
17
16
15
14
13
7 8
9
10
11 12
19
20212223
24
Exposed
Thermal Die*
COMP
ENR
EN
FB1
FB4
BASE
VIN SW SW
PGND PGND
SUP
C2−/MODE
C2+
OUT3
FB3
GND
PG
PWP PACKAGE
TOP VIEW
RGE PACKAGE
TOP VIEW
TPS65140, TPS65141
TPS65145
www.ti.com SLVS497E –SEPTEMBER 2003–REVISED NOVEMBER 2012
ELECTRICAL CHARACTERISTICS (continued)
V
in
= 3.3 V, EN = VIN, V
O
1 = 10 V, T
A
= -40°C to 85°C, typical values are at T
A
= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
D1 – D4 Shottky diode
V
d
I
D1-D4
= 40 mA 610 720 mV
forward voltage
I
O
Maximum output current 20 mA
10 V ≤ V
O
1 ≤ 15 V, I
load
= 10 mA,
Line regulation 0.56 %/V
V
O
3 = 27 V
Load regulation 1 mA ≤ I
O
≤ 20 mA, V
O
3 = 27 V 0.05 %/mA
LINEAR REGULATOR CONTROLLER V
O
4
V
O
4 Output voltage 4.5 V ≤ V
I
≤ 5.5 V; 10 mA ≤ I
O
≤ 500 mA 3.2 3.3 3.4 V
Vin-V
O
4-V
BE
≥ 0.5 V
(1)
13.5 19
Maximum base drive
I
BASE
mA
current
Vin-V
O
4-V
BE
≥ 0.75 V
(1)
20 27
Line regulation 4.75 V ≤ V
I
≤ 5.5 V, I
load
= 500 mA 0.186 %/V
Load regulation 1 mA ≤ I
O
≤ 500 mA, V
I
= 5 V 0.064 %/A
Start up current V
O
4 ≤ 0.8 V 11 20 25 mA
SYSTEM POWER GOOD (PG)
V
(PG, Vo1)
-12 -8.75% V
O
1 -6 V
V
(PG, Vo2)
Power good threshold
(2)
-13 -9.5% V
O
2 -5 V
V
(PG, Vo3)
-11 -8% V
O
3 -5 V
VOL PG output low voltage I
(sink)
= 500 μA 0.3 V
IL PG output leakage current VPG = 5 V 0.001 1 µA
(1) With V
I
= supply voltage of the TPS6514x, V
O
4 = output voltage of the regulator, V
BE
= basis emitter voltage of external transistor.
(2) The power good goes high when all 3 outputs (V
O
1, V
O
2, V
O
3) are above their threshold. The power good goes low as soon as one of
the outputs is below their threshold.
DEVICE INFORMATION
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