Datasheet

NEG
V
R3 R2
1.24V
= ×
( )
NEG FB FBG
R3
V V V
R2
= - + ×
POS
V
R1 R2 1
1.24V
æ ö
= × -
ç ÷
è ø
POS
R1 R2
V 1.24V
R2
+
= ×
1.24V
R2 120k
10 A
= » W
m
TPS65135
www.ti.com SLVS704A –NOVEMBER 2011–REVISED NOVEMBER 2011
Output Capacitor Selection
A 4.7-µF output capacitor is generally sufficient for most applications, but larger values can be used as well for
improved load- and line-transient response at higher load currents. The capacitors of Table 4 is recommended
for use with the TPS65135.
Table 4. Output Capacitor Selection
CAPACITOR COMPONENT SUPPLIER SIZE
10 µF / 6.3V Murata GRM188R60J106ME84D 0603
4.7 µF / 10V Taiyo Yuden LMK107BJ475 0603
10 µF / 6.3 V Taiyo Yuden JMK107BJ106 0603
SPACER
Setting the Output Voltages OUTP and OUTN
The feedback divider R1, R2, R3 sets the positive and negative output voltage. The device regulates the feeback
voltage FB to typically 1.24 V and the feedback FBG to typically 0V. R2 is selected to have at least 10 µA
through the feedback divider.
(7)
The positive output voltage and R1 are calculated as:
(8)
(9)
The negative output voltage is calculated as:
(10)
Since V
FBG
is typically regulated to 0 V, the formula can be simplified and R3 is then calculated as:
(11)
PCB Layout Guidelines
PCB layout is an important task in the power supply design. Good PCB layout minimizes EMI and allows very
good output voltage regulation. For the TPS65135 the following PCB layout guidelines are recommended.
Place the power components first. The inductor and the input and output capacitors must be as close as possible
to the IC pins. Place the bypass capacitor for the reference output voltage VAUX as close as possible to pin 4.
Use bold and wide traces for power traces connecting the inductor and input and output capacitors. Use a
common ground plane or a start ground connection.
See the TPS65135EVM-063 user's guide (SLVU244) and evaluation module for a PCB layout example.
Copyright © 2011, Texas Instruments Incorporated 13
Product Folder Links: TPS65135