Datasheet

Background
1-2
1.1 Background
The TPS65120EVM uses a TPS65120 single inductor, multichannel output IC
to provide the three output voltages necessary to power amorphous silicon
(a−Si) and low-temperature polysilicon (LTPS) TFT-LCD displays. The
TPS65120 has integrated power−up/down sequencing and an auxiliary linear
regulator providing an additional 3.3-V rail. The TPS65124EVM uses a
TPS65124 IC that provides the same output rails as the TPS65120EVM,
except that it has user-programmable power-up/down sequencing and
replaces the linear regulator with enable signals for VGH and VGL.
1.2 Performance Specification Summary
Table 1−1.Typical Performance Specification Summary for V
IN
= 3.6 V and T
A
= 255C
Specification
Output Voltage (V) Output Current (mA)
Specification
Min Typ Max Min Typ Max
VMAIN 4.95 5.00 5.05 25
VGH 11.64 12.00 12.36 4
VGL −12.36 −12.00 −11.64 4
LDOOUT (65120) 3.20 3.30 3.40 20
1.3 Modifications
The HPA076 PCB was designed to allow for several user−defined
modifications. In addition to being able to accommodate the other members
of the TPS6512x family, the board has unpopulated footprints of passive and
active elements which provide the following:
- VLOGIC Rail – P-channel FET Q1 (e.g., Si1031x) and supporting
passives C4, C9, C11, R11, R12, and J6 allow the input voltage to be gated
and provide a rail to power peripheral logic circuits . In addition, VLOGIC
enables VMAIN, VGH, and VGL after the RC time constant delay formed
by R11 and C9 (if R1 is removed).
- VMAIN Power−Down Sequencing – The TPS65120/1/2 actively power
down VMAIN only after FBL reaches 1.2 V typical. Using N-channel FET
Q2 (e.g., Si1032X) and supporting passives R10, R14, and R15 to alter
FBL, VMAIN’s power-down sequencing trip point can be moved. See the
TPS6521x data sheet (SLVS531) for guidance on sizing the passive
components.
- Independent VMAIN Sequencing – After RUN is pulled high, the
TPS6512x devices power up VMAIN. Using dual transistor Q3 (e.g.,
Si1016X), supporting passives JP4, R16, and R20, and removing R18, a
switch can be constructed to switch in VMAIN as the application requires.
R18 shorts out Q3.