Datasheet

PB_OUT
VDCDC1
(USB0_VDDA33)
3.3V
PGOOD
( )Reset
VDCDC3
(CVDD)
1.2V
400ms
PB_IN
POWER_ON
canbereleasedHIGHanytime
afterPOWR_ON=HIGH
170 sm 250 sm
assertedHIGHbytheapplicationprocessor
anytimewhile =LOWtokeepthePB_IN
systemalive
50msdebounce
SYS
50msdebounce
externalLDO
(RTC_CVDD)
1.2V
170 sm
250 sm
VLDO1
(SATA_VDDR)
1.8V
170 sm 250 sm
levelnotdefinedas
voltageatpull-uphas
notrampedatthattime
VDCDC2
(VDDSHV)
1.8V
VLDO2
(SATA_VDD)
1.2V
TPS65070, TPS65072, TPS65073
TPS650731, TPS650732, TPS650701, TPS650702, TPS650721
SLVS950G –JULY 2009–REVISED MAY 2013 www.ti.com
Figure 50. Timing for OMAP-L138
76 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated
Product Folder Links: TPS65070 TPS65072 TPS65073 TPS650731 TPS650732 TPS650701 TPS650702
TPS650721