Datasheet

TPS65070, TPS65072, TPS65073
TPS650731, TPS650732, TPS650701, TPS650702, TPS650721
www.ti.com SLVS950G –JULY 2009–REVISED MAY 2013
Bit 3..0 LDO1(3) to LDO1(0):
The Bits define the default output voltage of LDO1 according to the table below:
LDO1[3] LDO1[2] LDO1[1] LDO1[0] LDO1 OUTPUT
VOLTAGE
0 0 0 0 1.0 V
0 0 0 1 1.1 V
0 0 1 0 1.2 V
0 0 1 1 1.25 V
0 1 0 0 1.3 V
0 1 0 1 1.35 V
0 1 1 0 1.4 V
0 1 1 1 1.5 V
1 0 0 0 1.6 V
1 0 0 1 1.8 V
1 0 1 0 2.5 V
1 0 1 1 2.75 V
1 1 0 0 2.8 V
1 1 0 1 3.0 V
1 1 1 0 3.1 V
1 1 1 1 3.3 V
DEFLDO2. Register Address: 17h
DEFLDO2 B7 B6 B5 B4 B3 B2 B1 BO
Bit name and function LDO2 tracking LDO2[5] LDO2[4] LDO2[3] LDO2[2] LDO2[1] LDO2[0]
Default for –70, –72 0 0 0 1 0 0 1 1
Default for -701 0 0 1 1 0 0 1 1
Default for -702 0 0 1 1 1 1 1 1
Default for –73, –731,
0 0 1 0 0 1 0 1
–732
Default for -721 0 1 1 1 1 0 0 1
Default value loaded
UVLO UVLO UVLO UVLO UVLO UVLO UVLO
by:
Read/write R R/W R/W R/W R/W R/W R/W R/W
The DEFLDO2 register is used to set the output voltage of LDO2 according to the voltage table defined under
DEFDCDC3 when Bit LDO2 tracking is set to 0. In case Bit LDO2 tracking is set to 1, the output voltage of LDO2
is defined by the contents defined for DCDC3.
Bit 6 LDO2 TRACKING:
0 = the output voltage is defined by register DEFLDO2
1 = the output voltage follows the setting defined for DCDC3 (DEFDCDC3_LOW or
DEFDCDC3_HIGH, depending on the state of pin DEFDCDC3)
Bit 5..0 LDO2[5] to LDO2[0]:
output voltage setting for LDO2 similar to DCDC3
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TPS650721