Datasheet
TPS65070, TPS65072, TPS65073
TPS650731, TPS650732, TPS650701, TPS650702, TPS650721
www.ti.com
SLVS950G –JULY 2009–REVISED MAY 2013
CON_CTRL3. Register Address: 0Fh
CON_CTRL3 B7 B6 B5 B4 B3 B2 B1 BO
FPWM FPWM FPWM DCDC1 DCDC2 DCDC3 LDO1 LDO2
Bit name and function
DCDC3 DCDC2 DCDC1 discharge discharge discharge discharge discharge
Default 0 0 0 1 1 1 1 1
Default value loaded by: UVLO UVLO UVLO UVLO UVLO UVLO UVLO UVLO
Read/write R/W R/W R/W R/W R/W R/W R/W R/W
Bit 7 FPWM DCDC3:
0 = DCDC3 converter operates in PWM / PFM mode
1 = DCDC3 converter is forced into fixed frequency PWM mode
Bit 6 FPWM DCDC2:
0 = DCDC2 converter operates in PWM / PFM mode
1 = DCDC2 converter is forced into fixed frequency PWM mode
Bit 5 FPWM DCDC1:
0 = DCDC1 converter operates in PWM / PFM mode
1 = DCDC1 converter is forced into fixed frequency PWM mode
Bit 4–0 0 = the output capacitor of the associated converter or LDO is not actively discharged when
the converter or LDO is disabled
1 = the output capacitor of the associated converter or LDO is actively discharged when the
converter or LDO is disabled. This decreases the fall time of the output voltage at light load
DEFDCDC1. Register Address: 10h
DEFDCDC1 B7 B6 B5 B4 B3 B2 B1 BO
DCDC1
Bit name and function DCDC1[5] DCDC1[4] DCDC1[3] DCDC1[2] DCDC1[1] DCDC1[0]
extadj
Default for –70, –72 0 0 1 1 1 1 1 1
Default for -701, - 702 0 0 0 1 0 0 1 1
Default for –73, –731,
0 0 1 0 0 1 0 1
–732
Default for -721 0 0 1 1 1 0 0 1
Default value loaded by: UVLO UVLO UVLO UVLO UVLO UVLO UVLO UVLO
Read/write R/W R R/W R/W R/W R/W R/W R/W
DEFDCDC1 sets the output voltage for the DCDC1 converter. Per default the converter is internally fixed but can
be programmed to an externally adjustable version by setting Bit 7 (Ext adj). The default setting is defined in an
EEPROM Bit. In case the externally adjustable version is programmed, the external resistor divider need to be
connected to the VDCDC1 pin, otherwise this pin needs to be connected to the output voltage directly. For the
fixed voltage version, the output voltage is set with Bits B0 to B5 (DCDC1[5] to DCDC1[0]):
All step-down converters provide the same output voltage range, see details under DEFDCDC3
Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 57
Product Folder Links: TPS65070 TPS65072 TPS65073 TPS650731 TPS650732 TPS650701 TPS650702
TPS650721