Datasheet

TPS65070, TPS65072, TPS65073
TPS650731, TPS650732, TPS650701, TPS650702, TPS650721
www.ti.com SLVS950G –JULY 2009–REVISED MAY 2013
PGOODMASK. Register Address: 0Ch
B7 B6 B5 B4 B3 B2 B1 BO
MASK
MASK MASK MASK MASK
Bit name and function VDCDC3 and MASKLDO1
VDCDC1 VDCDC2 VDCDC3 LDO2
LDO1
Default for –70 0 0 0 0 1 0 0 0
Default for –701 0 0 0 1 1 1 0 1
Default for -702 0 0 0 1 1 1 0 1
Default for -72 0 0 0 1 0 0 0 0
Default for -73, -731, -
0 0 0 1 1 1 0 0
732
Default for -721 0 0 0 0 0 1 0 1
Set by signal
Default value loaded
UVLO UVLO UVLO UVLO UVLO UVLO
by:
Read/write R R R/W R/W R/W R/W R/W R/W
Bit 5 MASK VDCDC3 and LDO1:
0 = indicates that the output voltage of either DCDC3 or LDO1 is within its nominal range. The
PGOOD output is not affected (not driven LOW)
1 = indicates that both LDO1 AND DCDC3 output voltage is below its target regulation voltage or
disabled. This will drive the PGOOD output low.
Bit 4..0 MASK VDCDC1/2/3, LDO1,2:
0 = the status of the power good Bit in Register PGOOD does not affect the status of the PGOOD
output pin
1 = the PGOOD pin is driven low in case the output voltage of the converter or LDO is below its
target regulation voltage or disabled.
Copyright © 2009–2013, Texas Instruments Incorporated Submit Documentation Feedback 53
Product Folder Links: TPS65070 TPS65072 TPS65073 TPS650731 TPS650732 TPS650701 TPS650702
TPS650721