Datasheet

TPS65070, TPS65072, TPS65073
TPS650731, TPS650732, TPS650701, TPS650702, TPS650721
www.ti.com SLVS950G –JULY 2009–REVISED MAY 2013
PB_OUT
This pin is a status output. PB_OUT is used as the wake-up interrupt to an application processor based on the
status of PB_IN. If PB_IN=LOW, PB_OUT = LOW (after 50ms debounce). If PB_IN=HIGH, PB_OUT= high
impedance (HIGH).
The pull-up resistor for this open drain output must not be connected directly to the battery as this may cause a
leakage path when the power path (SYS) is turned off.
POWER_ON
This pin is an input to the PMU which needs to be pulled HIGH for the PMU to stay in POWER ON_2-state once
PB_IN is released. Once this pin is pulled LOW while PB_IN=LOW, the PMU is shutting down without delay,
turning off the DCDC converters and the LDOs. If POWER_ON is pulled HIGH while there is power at USB or
AC, the TPS6507x will enter POWER ON_2-state and start the DCDC converters and LDOs according to the
sequence programmed. See Figure 33.
EN_wLED (TPS65072, TPS650701, TPS650702, TPS650721 only)
If the EN_wLED pin is pulled HIGH, the boost converter is enabled with a default duty cycle of 30% for dimming.
If the pin is pulled LOW, the boost convert is disabled. The white LED boost converter can also be enabled with
its ENABLE ISINK Bit in register WLED_CTRL1. The converter is enabled whenever the pin is HIGH OR the Bit
is set to 1.
EN_EXTLDO (TPS65072 only)
The EN_EXTLDO pin will go high during startup depending on the sequencing option programmed. The pin will
go low again if the TPS6507x is going to OFF state (POWER OFF).
The external LDO is used for the sequencing option DCDC_SQ[0,2]=111, LDO_SQ[0,2]=010, used for the Atlas4
processor and with sequencing option DCDC_SQ[0,2]=100, LDO_SQ[0,2]=111 used for the Sirf Prima processor.
See the application section for the timing diagrams.
SHORT-CIRCUIT PROTECTION
All outputs are short circuit protected with a maximum output current as defined in the electrical specifications.
THERMAL SHUTDOWN
As soon as the junction temperature, T
J
, exceeds typically 150°C for the DCDC converters or LDOs, the device
goes into thermal shutdown. In this mode, the high side MOSFETs are turned-off. The device continues its
operation when the junction temperature falls below the thermal shutdown hysteresis again. A thermal shutdown
for one of the DCDC converters or LDOs will disable all step-down converters simultaneously.
Low Dropout Voltage Regulators
The low dropout voltage regulators are designed to operate well with low value ceramic input and output
capacitors. They operate with input voltages down to 1.8V. The LDOs offer a maximum dropout voltage of
200mV at rated output current. Each LDO supports a current limit feature. LDO2 is enabled internally using Bit
ENABLE_LDO2 in register CON_CTRL1. The output voltage for LDO2 is defined by the settings in register
DEFLDO2. LDO2 can also be configured in such a way that it follows the output voltage of converter DCDC3 by
setting Bit LDO2 TRACKING = 1 in register DEFLDO2.
LDO1 is enabled internally using Bit ENABLE_LDO1 in register CON_CTRL1. The output voltage for LDO1 is
defined by the settings in register LDO_CTRL1 can also be enabled automatically depending on the settings in
register LDO_CTRL1.
White LED Boost Converter
The converter is in shutdown mode by default and is being turned on by setting the enable Bit with the I2C
interface or for TPS65072 with pin EN_wLED. The enable Bit is located in register WLED_CTRL1 and is called
ENABLE ISINK as it enables the current sink for the white LEDs. Once enabled, an output voltage is
automatically generated at FB_wLED, high enough to force the programmed current through the string of white
LEDs. Two strings of white LEDs can be powered. The current in each of the two strings is regulated by an
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Product Folder Links: TPS65070 TPS65072 TPS65073 TPS650731 TPS650732 TPS650701 TPS650702
TPS650721