Datasheet

Output Capacitor Selection
I
RMSCout
+ Vout
1 *
Vout
Vin
L ƒ
1
2 3
Ǹ
(5)
DVout + Vout
1 *
Vout
Vin
L ƒ
ǒ
1
8 Cout ƒ
) ESR
Ǔ
(6)
Input Capacitor Selection
TPS650250
www.ti.com ........................................................................................................................................................................................... SLVS843 – DECEMBER 2008
I
Lmax
= Maximum inductor current
The highest inductor current occurs at maximum Vin.
Open core inductors have a soft saturation characteristic and they can usually handle higher inductor currents
versus a comparable shielded inductor.
A more conservative approach is to select the inductor current rating just for the maximum switch current of the
corresponding converter. Consideration must be given to the difference in the core material from inductor to
inductor which has an impact on efficiency especially at high switching frequencies. See Table 2 and the typical
applications for possible inductors.
Table 2. Tested Inductors
INDUCTOR COMPONENT
DEVICE TYPE
VALUE SUPPLIER
3.3 µ H LPS3015-332 (output current up to 1A) Coilcraft
2.2 µ H LPS3015-222 (output current up to 1A) Coilcraft
3.3 µ H VLCF4020T-3R3N1R5 TDK
2.2 µ H VLCF4020T-2R2N1R7 TDK
2.2 µ H LPS3010-222 Coilcraft
DCDC3 converter 2.2 µ H LPS3015-222 Coilcraft
2.2 µ H VLCF4020-2R2 TDK
The advanced Fast Response voltage mode control scheme of the inductive converters implemented in the
TPS650250x allows the use of small ceramic capacitors with a typical value of 10uF for each converter, without
having large output voltage under and overshoots during heavy load transients. Ceramic capacitors having low
ESR values have the lowest output voltage ripple and are recommended. Refer to Table 3 for recommended
components.
If ceramic output capacitors are used, the capacitor RMS ripple current rating will always meet the application
requirements. For completeness, the RMS ripple current is calculated as:
At nominal load current the inductive converters operate in PWM mode and the overall output voltage ripple is
the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and
discharging the output capacitor:
Where the highest output voltage ripple occurs at the highest input voltage, Vin.
At light load currents the converters operate in Power Save Mode and output voltage ripple is dependent on the
output capacitor value. The output voltage ripple is set by the internal comparator delay and the external
capacitor. Typical output voltage ripple is less than 1% of the nominal output voltage.
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required for best input voltage filtering and minimizing interference with other circuits caused by high input
voltage spikes. Each dcdc converter requires a 10uF ceramic input capacitor on its input pin VINDCDCx. The
input capacitor can be increased without any limit for better input voltage filtering. The Vcc pin should be
separated from the input for the DC/DC converters. A filter resistor of up to 10 Ω and a 1 µ F capacitor should be
used for decoupling the Vcc pin from switching noise. Note that the filter resistor may affect the UVLO threshold
since up to 3mA can flow via this resistor into the Vcc pin when all converters are running in PWM mode.
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