Datasheet
EN_DCDC1
ENABLE
VCC
VLDO1
200 mA LDO
VLDO1
VLDO2
VINDCDC1
VLDO2
200 mA LDO
VIN_LDO
ENABLE
VIN
MODE
1 mF
1R
10 mF
TPS650250
EN_LDO
Vbat
PWRFAIL
AGND1
I/Ovoltage
R19
L1
DEFDCDC1
VDCDC1
PGND1
DCDC1 (I/O)
STEP-DOWN
CONVERTER
1600 mA
R1
R2
EN_DCDC2
VINDCDC2
L2
DEFDCDC2
VDCDC2
PGND2
DCDC2
(memory)
STEP-DOWN
CONVERTER
800 mA
R3
R4
EN_DCDC3
VINDCDC3
L3
DEFDCDC3
VDCDC3
PGND3
DCDC3 (core)
STEP-DOWN
CONVERTER
800 mA
R7
R8
Vbat
Vbat
Vbat
Vdd_alive
VLDO3
30 mA LDO
2.2 mF
1 V
3.3 V / 2.8 V
oradjustable
2.5 V / 1.8 V
oradjustable
VCC
PWRFAIL _SNS
Vbat
Vref=1V
+
-
R11
R12
AGND2
PWM/ PFM
EN_Vdd_alive
ENABLE
R9
R10
R5
R6
10 mF
ENABLE
10 mF
ENABLE
2.2 mF
2.2 mF
22 mF
2.2 mH
22 mF
2.2 mH
22 mF
2.2 mH
FB_LDO1
FB_LDO2
TPS650250-Q1
SLVSAA7 –MARCH 2010
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Functional Block Diagram
ORDERING INFORMATION
(1)
VOLTAGE AT OUTPUT CURRENT ON VOLTAGE AT ORDERABLE PART TOP-SIDE
T
J
PACKAGE
DCDC3 DCDC1 / DCDC2 / DCDC3 VDD_ALIVE NUMBER
(2)
MARKING
32-Pin QFN
–40°C to 125°C Adjustable 1.6A / 0.8A / 0.8A 1V TPS650250QRHBRQ1 TPS650250Q
(RHB)
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
2 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS650250-Q1