Datasheet
TYPICAL CHARACTERISTICS
Parameter Measurement Information
TPS650240 , , TPS650241
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SLVS774B – JUNE 2007 – REVISED JULY 2009 ..............................................................................................................................................................
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Graphs were taken using the EVM with the following inductor/output capacitor combinations:
OUTPUT CAPACITOR
CONVERTER INDUCTOR OUTPUT CAPACITOR
VALUE
DCDC1 VLCF4020-3R3 C2012X5R0J226M 22 µ F
DCDC2 VLCF4020-2R2 C2012X5R0J226M 22 µ F
DCDC3 LPS3010-222 C2012X5R0J226M 22 µ F
Table of Graphs
FIGURE
η Efficiency VDCDC1 vs Load current PWM/PFM; V
O
= 3.3V Figure 1
η Efficiency VDCDC1 vs Load current PWM; V
O
= 3.3V Figure 2
η Efficiency VDCDC2 vs Load current PWM/PFM; V
O
= 1.8V Figure 3
η Efficiency VDCDC2 vs Load current PWM; V
O
= 1.8V Figure 4
η Efficiency VDCDC3 vs Load current PWM/PFM; V
O
= 1.3V Figure 5
η Efficiency VDCDC3 vs Load current PWM; V
O
= 1.3V Figure 6
Line transient response VDCDC1 Figure 7
Line transient response VDCDC2 Figure 8
Line transient response VDCDC3 Figure 9
Load transient response VDCDC1 Figure 10
Load transient response VDCDC2 Figure 11
Load transient response VDCDC3 Figure 12
Output voltage ripple DCDC2; PFM mode Figure 13
Output voltage ripple DCDC2; PWM mode Figure 14
Load regulation for Vdd_alive Figure 15
Start-up VDCDC1 to VDCDC3 Figure 16
Start-up LDO1 and LDO2 Figure 17
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