Datasheet
t =2
(reset)
x128x
(1V-0.25V)xC
(reset)
2 Am
()
TPS65023, TPS65023B
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SLVS670J –JUNE 2006– REVISED SEPTEMBER 2011
VRTC Output
It is required that a 4.7-μF (minimum) capacitor be added to the VRTC pin even if the output is not used.
LDO1 and LDO2
The LDOs in the TPS65023, TPS65023B are general-purpose LDOs which are stable using ceramics capacitors.
The minimum output capacitor required is 2.2 μF. The LDOs output voltage can be changed to different voltages
between 1 V and 3.3 V using the I
2
C interface. Therefore, they can also be used as general-purpose LDOs in
applications powering processors different from DaVinci. The supply voltage for the LDOs needs to be connected
to the VINLDO pin, giving the flexibility to connect the lowest voltage available in the system and provides the
highest efficiency.
TRESPWRON
This is the input to a capacitor that defines the reset delay time after the voltage at VRTC rises above 2.52 V.
The timing is generated by charging and discharging the capacitor with a current of 2 μA between a threshold of
0.25 V and 1 V for 128 cycles. A 1-nF capacitor gives a delay time of 100 ms.
While there is no real upper and lower limit for the capacitor connected to TRESPWRON, it is recommended to
not leave signal pins open.
(9)
Where:
t
(reset)
is the reset delay time
C
(reset)
is the capacitor connected to the TRESPWRON pin
The minimum and maximum values for the timing parameters called ICONST (2uA), TRESPWRON_UPTH (1V)
and TRESPWRON_LOWTH (0.25V) can be found under the electrical characteristics.
V
CC
-Filter
An RC filter connected at the VCC input is used to keep noise from the internal supply for the bandgap and other
analog circuitry. A typical value of 1 R and 1 μF is used to filter the switching spikes, generated by the dc-dc
converters. A larger resistor than 10 R should not be used because the current into VCC of up to 3 mA causes a
voltage drop at the resistor causing the undervoltage lockout circuitry connected at VCC internally to switch off
too early.
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