Datasheet

TPS65023, TPS65023B
SLVS670J –JUNE 2006– REVISED SEPTEMBER 2011 www.ti.com
DEFCORE. Register Address: 06h (read/write Default Value: 14h/1Eh
DEFCORE B7 B6 B5 B4 B3 B2 B1 B0
Bit name and
CORE4 CORE3 CORE2 CORE1 CORE0
function
Default 0 0 0 1 DEFDCDC1 DEFDCDC1 DEFDCDC1 DEFDCDC1
Default value
RESET(1) RESET(1) RESET(1) RESET(1) RESET(1)
loaded by:
Read/Write R/W R/W R/W R/W R/W
RESET(1): DEFCORE is reset to its default value by one of these events:
• undervoltage lockout (UVLO)
• HOT_RESET pulled low
• RESPWRON active
• VRTC below threshold
CORE4 CORE3 CORE2 CORE1 CORE0 VDCDC1 CORE4 CORE3 CORE2 CORE1 CORE0 VDCDC1
0 0 0 0 0 0.8 V 1 0 0 0 0 1.2 V
0 0 0 0 1 0.825 V 1 0 0 0 1 1.225 V
0 0 0 1 0 0.85 V 1 0 0 1 0 1.25 V
0 0 0 1 1 0.875 V 1 0 0 1 1 1.275 V
0 0 1 0 0 0.9 V 1 0 1 0 0 1.3 V
0 0 1 0 1 0.925 V 1 0 1 0 1 1.325 V
0 0 1 1 0 0.95 V 1 0 1 1 0 1.35 V
0 0 1 1 1 0.975 V 1 0 1 1 1 1.375 V
0 1 0 0 0 1 V 1 1 0 0 0 1.4 V
0 1 0 0 1 1.025 V 1 1 0 0 1 1.425 V
0 1 0 1 0 1.05 V 1 1 0 1 0 1.45 V
0 1 0 1 1 1.075 V 1 1 0 1 1 1.475 V
0 1 1 0 0 1.1 V 1 1 1 0 0 1.5 V
0 1 1 0 1 1.125 V 1 1 1 0 1 1.525 V
0 1 1 1 0 1.15 V 1 1 1 1 0 1.55 V
0 1 1 1 1 1.175 V 1 1 1 1 1 1.6 V
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