Datasheet
TPS65023, TPS65023B
SLVS670J –JUNE 2006– REVISED SEPTEMBER 2011
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ELECTRICAL CHARACTERISTICS
VINDCDC1 = VINDCDC2 = VINDCDC3 = VCC = VINLDO = 3.6 V, VBACKUP = 3 V, T
A
= –40°C to 85°C, typical values are
at T
A
= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VLDO1 and VLDO2 LOW DROPOUT REGULATORS
V
I
Input voltage range for LDO1, 2 1.5 6.5 V
V
O(LD01)
LDO1 output voltage range 1 3.15 V
V
O(LDO2)
LDO2 output voltage range 1 3.3 V
V
I
= 1.8 V, V
O
= 1.3 V 200
I
O
Maximum output current for LDO1, LDO2 mA
V
I
= 1.5 V, V
O
= 1.3 V 120
I
(SC)
LDO1 and LDO2 short circuit current limit V
(LDO1)
= GND, V
(LDO2)
= GND 400 mA
I
O
= 50 mA, VINLDO = 1.8 V 120
Minimum voltage drop at LDO1, LDO2 I
O
= 50 mA, VINLDO = 1.5 V 65 150 mV
I
O
= 200 mA, VINLDO = 1.8 V 300
Output voltage accuracy for LDO1, LDO2 I
O
= 10 mA –2% 1%
VINLDO1, 2 = VLDO1,2 + 0.5 V
Line regulation for LDO1, LDO2 –1% 1%
(min. 2.5 V) to 6.5 V, I
O
= 10 mA
Load regulation for LDO1, LDO2 I
O
= 0 mA to 50 mA –1% 1%
Regulation time for LDO1, LDO2 Load change from 10% to 90% 10 μs
ANALOGIC SIGNALS DEFDCDC1, DEFDCDC2, DEFDCDC3
V
IH
High-level input voltage 1.3 VCC V
V
IL
Low-level input voltage 0 0.1 V
Input bias current 0.001 0.05 μA
THERMAL SHUTDOWN
T
(SD)
Thermal shutdown Increasing junction temperature 160 °C
Thermal shutdown hysteresis Decreasing junction temperature 20 °C
INTERNAL UNDERVOLTAGE LOCK OUT
UVLO Internal UVLO VCC falling –2% 2.35 2% V
V
(UVLO_HYST
Internal UVLO comparator hysteresis 120 mV
)
VOLTAGE DETECTOR COMPARATORS
Comparator threshold
Falling threshold –1% 1 1% V
(PWRFAIL_SNS, LOWBAT_SNS)
Hysteresis 40 50 60 mV
Propagation delay 25-mV overdrive 10 μs
POWER GOOD
VDCDC1, VDCDC2, VDCDC3, VLDO1,
V
(PGOODF)
–12% –10% –8%
VLDO2, decreasing
VDCDC1, VDCDC2, VDCDC3, VLDO1,
V
(PGOODR)
–7% –5% –3%
VLDO2, increasing
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