Datasheet

TPS65022
SLVS667A JULY 2006 REVISED SEPTEMBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS
VINDCDC1 = VINDCDC2 = VINDCDC3 = VCC = VINLDO = 3.6 V, VBACKUP = 3 V, T
A
= 40°C to 85°C, typical values are
at T
A
= 25°C (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
VDCDC2 STEP-DOWN CONVERTER
V
I
Input voltage range, VINDCDC2 2.5 6 V
I
O
Maximum output current 1000 mA
I
(SD)
Shutdown supply current in VINDCDC2 DCDC2_EN = GND 0.1 1 μA
r
DS(on)
P-channel MOSFET on-resistance VINDCDC2 = V
(GS)
= 3.6 V 140 300 m
I
lkg
P-channel leakage current VINDCDC2 = 6 V 2 μA
r
DS(on)
N-channel MOSFET on-resistance VINDCDC2 = V
(GS)
= 3.6 V 150 297 m
I
lkg
N-channel leakage current V
(DS)
= 6 V 7 10 μA
I
LIMF
Forward current limit (P- and N-channel) 2.5 V < VINDCDC2 < 6 V 1.4 1.55 1.7 A
f
S
Oscillator frequency 1.3 1.5 1.7 MHz
VINDCDC2 = 2.5 V to 6 V;
1.8 V 2% 2%
0 mA I
O
1 A
Fixed output voltage
FPWMDCDC2=0
VINDCDC2 = 2.8 V to 6 V;
2.5 V 2% 2%
0 mA I
O
1 A
VINDCDC2 = 2.5 V to 6 V;
1.8 V 2% 2%
0 mA I
O
1 A
Fixed output voltage
FPWMDCDC2=1
VINDCDC2 = 2.8 V to 6 V;
2.5 V 1% 1%
0 mA I
O
1 A
Adjustable output voltage with resistor VINDCDC2 = VDCDC2 + 0.3 V (min 2.5 V)
2% 2%
divider at DEFDCDC2 FPWMDCDC2=0 to 6 V; 0 mA I
O
1 A
Adjustable output voltage with resistor VINDCDC2 = VDCDC2 + 0.3 V (min 2.5 V)
1% 1%
divider at DEFDCDC2; FPWMDCDC2=1 to 6 V; 0 mA I
O
1 A
VINDCDC2 = VDCDC2 + 0.3 V (min. 2.5 V)
Line Regulation 0 %/V
to 6 V; I
O
= 10 mA
Load Regulation I
O
= 10 mA to 1 mA 0.25 %/A
VDCDC2 ramping from 5% to 95% of target
Soft start ramp time 750 μs
value
Internal resistance from L2 to GND 1 M
VDCDC2 discharge resistance DCDC2 discharge =1 300
8 Submit Documentation Feedback Copyright © 20062011, Texas Instruments Incorporated
Product Folder Link(s) : TPS65022