Datasheet

I
RMSCout
=V
out
x
1-
V
out
V
in
L x ¦
x
1
2x 3Ö
DV
out
=V
out
x
1-
V
out
V
in
L x ¦
x
+ESR
( )
1
8xC x
out
¦
TPS65022
SLVS667A –JULY 2006– REVISED SEPTEMBER 2011 www.ti.com
A more conservative approach is to select the inductor current rating just for the maximum switch current of the
TPS65022 (2 A for the VDCDC1 and VDCDC2 converters, and 1.5 A for the VDCDC3 converter). The core
material from inductor to inductor differs and has an impact on the efficiency especially at high switching
frequencies.
See Table 4 and the typical applications for possible inductors.
Table 4. Tested Inductors
DEVICE INDUCTOR TYPE COMPONENT SUPPLIER
VALUE
3.3 μH CDRH2D14NP-3R3 Sumida
3.3 μH LPS3010-332 Coilcraft
DCDC3 converter
3.3 μH VLF4012AT-3R3M1R3 TDK
2.2 μH VLF4012AT-2R2M1R5 TDK
3.3 μH CDRH2D18/HPNP-3R3 Sumida
DCDC2 converter 3.3 μH VLF4012AT-3R3M1R3 TDK
2.2 μH VLCF4020-2R2 TDK
3.3 μH CDRH3D14/HPNP-3R2 Sumida
3.3 μH CDRH4D28C-3R2 Sumida
DCDC1 converter
3.3 μH MSS5131-332 Coilcraft
2.2 μH VLCF4020-2R2 TDK
Output Capacitor Selection
The advanced Fast Response voltage mode control scheme of the inductive converters implemented in the
TPS65022 allow the use of small ceramic capacitors with a typical value of 10 μF for each converter without
having large output voltage under and overshoots during heavy load transients. Ceramic capacitors having low
ESR values have the lowest output voltage ripple and are recommended. See Table 5 for recommended
components.
If ceramic output capacitors are used, the capacitor RMS ripple current rating always meets the application
requirements. Just for completeness, the RMS ripple current is calculated as:
(6)
At nominal load current, the inductive converters operate in PWM mode. The overall output voltage ripple is the
sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and
discharging the output capacitor:
(7)
Where the highest output voltage ripple occurs at the highest input voltage V
in
.
At light load currents, the converters operate in PSM and the output voltage ripple is dependent on the output
capacitor value. The output voltage ripple is set by the internal comparator delay and the external capacitor. The
typical output voltage ripple is less than 1% of the nominal output voltage.
Input Capacitor Selection
Because of the nature of the buck converter having a pulsating input current, a low ESR input capacitor is
required for best input voltage filtering and minimizing the interference with other circuits caused by high input
voltage spikes. Each dc-dc converter requires a 10-μF ceramic input capacitor on its input pin VINDCDCx. The
input capacitor is increased without any limit for better input voltage filtering. The VCC pin is separated from the
input for the dc-dc converters. A filter resistor of up to 10R and a 1-μF capacitor is used for decoupling the VCC
pin from switching noise. Note that the filter resistor may affect the UVLO threshold since up to 3 mA can flow via
this resistor into the VCC pin when all converters are running in PWM mode.
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