Datasheet

RESPWRON
VRTC
LDO
V
CC
VRTC
V
ref
V
ref
V
ref
priority
#3
priority
#2
priority
#1
EN
V_VSYSIN
V_VBACKUP
VBACKUP
V_VBACKUP
VSYSIN
V_VSYSIN
TPS65022
SLVS667A –JULY 2006– REVISED SEPTEMBER 2011 www.ti.com
A. V_VSYSIN, V_VBACKUP thresholds: falling = 2.55 V, rising = 2.65 V ±3%
B. RESPWRON thresholds: falling = 2.4 V, rising = 2.52 V ±3%
Figure 25.
STEP-DOWN CONVERTERS, VDCDC1, VDCDC2, and VDCDC3
The TPS65022 incorporates three synchronous step-down converters operating typically at 1.5 MHz fixed
frequency pulse width modulation (PWM) at moderate to heavy load currents. At light load currents, the
converters automatically enter the power save mode (PSM), and operate with pulse frequency modulation (PFM).
The VDCDC1 converter is capable of delivering 1.2 A output current, the VDCDC2 converter is capable of
delivering 1 A and the VDCDC3 converter is capable of delivering up to 900 mA.
The converter output voltages can be programmed via the DEFDCDC1, DEFDCDC2 and DEFDCDC3 pins. The
pins can either be connected to GND, VCC, or to a resistor divider between the output voltage and GND. The
VDCDC1 converter defaults to 3 V or 3.3 V depending on the DEFDCDC1 configuration pin. If DEFDCDC1 is
tied to ground, the default is 3 V. If it is tied to VCC, the default is 3.3 V. When the DEFDCDC1 pin is connected
to a resistor divider, the output voltage can be set in the range of 0.6 V to VINDCDC1 V. See the application
information section for more details.
The VDCDC2 converter defaults to 1.8 V or 2.5 V depending on the DEFDCDC2 configuration pin. If DEFDCDC2
is tied to ground, the default is 1.8 V. If it is tied to VCC, the default is 2.5 V. When the DEFDCDC2 pin is
connected to a resistor divider, the output voltage can be set in the range of 0.6 V to VINDCDC2 V.
The VDCDC3 converter defaults to 1.3 V or 1.55 V depending on the DEFDCDC3 configuration pin. If
DEFDCDC3 is tied to ground the default is 1.3 V. If it is tied to VCC, the default is 1.55 V. When the DEFDCDC3
pin is connected to a resistor divider, the output voltage can be set in the range of 0.6 V to VINDCDC3 V. The
core voltage can be reprogrammed via the serial interface in the range of 0.8 V to 1.6 V with a programmable
slew rate. The converter is forced into PWM operation whilst any programmed voltage change is underway,
whether the voltage is being increased or decreased. The DEFCORE and DEFSLEW registers are used to
program the output voltage and slew rate during voltage transitions.
The step-down converter outputs (when enabled) are monitored by power good (PG) comparators, the outputs of
which are available via the serial interface. The outputs of the dc-dc converters can be optionally discharged via
on-chip 300-Ω resistors when the dc-dc converters are disabled.
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