Datasheet

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AC (or USB)
BATT COVER
BAT COVER
DEG *
REFSYS
EN*
UVLO*
ENABLE
SUPPLIES*
VCORE
VMAIN
VLDO1
VLDO2
98%
VCORE
95%
VMAIN
*.... internal signal
UVLO Threshold
RESPWRON
MPU_RESET
PWRFAIL
INT
V
CC
t
n(RESPWRON)
t
(GLITCH)
TPS65013
SLVS517A – AUGUST 2004 – REVISED JANUARY 2005
Figure 33. State 1 to State 4 to State 2 Transition (Power up Behavior When Charge Voltage is Applied)
Valid for LDO1 supplied from VMAIN as described earlier in this Application Section.
31