Datasheet

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TPS65013
SLVS517A – AUGUST 2004 – REVISED JANUARY 2005
PIN ASSIGNMENTS (continued)
Terminal Functions
TERMINAL
I/O DESCRIPTION
NAME NO.
CHARGER SECTION
Charger input voltage from ac adapter. The AC pin can be left open or can be connected to
AC 40 I
ground if the charger is not used.
Charger input voltage from USB port. The USB pin can be left open or can be connected to
USB 43 I
ground if the charger is not used.
ISET 37 I External charge current setting resistor connection for use with ac adapter
VBAT_A 41 I Sense input for the battery voltage. Connect directly with the battery.
VBAT_B 42 O Power output of the battery charger. Connect directly with the battery.
TS 38 I Battery temperature sense input
PG 11 O Indicates when a valid power supply is present for the charger (open drain)
AGND2 44 Analog ground connection. All analog ground pins are connected internally on the chip.
PowerPAD™ - Connect the PowerPAD to GND
SWITCHING REGULATOR SECTION
AGND3 45 Analog ground connection. All analog ground pins are connected internally on the chip.
VINMAIN_A, 7,8 I Input voltage for VMAIN step-down converter. This must be connected to the same voltage
VINMAIN_B supply as VINCORE and VCC.
L1_A, L1_B 9,10 Switch pin of VMAIN converter. The VMAIN inductor is connected here.
VMAIN 13 I VMAIN feedback voltage sense input, connect directly to VMAIN
Power supply for digital and analog circuitry of MAIN and CORE dc-dc converters. This
VCC 6 I must be connected to the same voltage supply as VINCORE and VINMAIN. Also supplies
serial interface block
PGND1_A, Power ground for VMAIN converter
15,16
PGND1_B
Input voltage for VCORE step-down converter. This must be connected to the same voltage
VINCORE 5 I
supply as VINMAIN and VCC.
L2 4 Switch pin of VCORE converter. The VCORE inductor is connected here.
VCORE 48 I VCORE feedback voltage sense input, connect directly to VCORE
PGND2 46 Power ground for VCORE converter
LDO REGULATOR SECTION
AGND1 21 Analog ground connection. All analog ground pins are connected internally on the chip.
VINLDO1 22 I Input voltage for LDO1
VLDO1 24 O Output voltage for LDO1
VFB_LDO1 23 I Feedback input from external resistive divider for LDO1
VINLDO2 19 I Input voltage for LDO2
VLDO2 20 O Output and feedback voltage for LDO2
DRIVER SECTION
LED2 2 O LED driver, with blink rate programmable via serial interface
VIB 3 O Vibrator driver, enabled via serial interface
CONTROL AND I2C SECTION
PS_SEQ 14 I Sets power-up/down sequence of step-down converters
PB_ONOFF 47 I Push-button enable pin, also used to wakeup processor from low-power mode
BATT_COVER 39 I Indicates if battery cover is in place
HOT_RESET 31 I Push-button reset input used to reboot or wakeup processor via TPS65013
MPU_RESET 32 O Open-drain reset output generated by user activated HOT_RESET
Open-drain system reset output, generated according to the state of the VMAIN output
RESPWRON 33 O
voltage. If the main output is disabled, RESPWRON is active (i.e., low).
TPOR 27 I Sets the reset delay time at RESPWRON. TPOR = 0: T
n(RESPWRON)
= 100 ms.
TPOR = 1: T
n(RESPWRON)
= 1 s.
10