Datasheet

TPS65001
RUKPACKAGE
(TOP VIEW)
Exposed ThermalPad
16 15 14 13
12
11
10
9
5 6 7 8
1
2
3
4
Exposed ThermalPad
1
2
3
4
5
15
14
13
12
11
1617181920
109876
TPS65000
RTEPACKAGE
(TOP VIEW)
TPS65000, TPS65001, TPS650001
TPS650003, TPS650006, TPS650061
SLVS810B –JUNE 2009–REVISED AUGUST 2010 www.ti.com
PIN ASSIGNMENTS
PIN FUNCTIONS
PIN
I/O DESCRIPTION
NAME TPS65000 TPS65001
VINDCDC 6 8 I Input voltage to DCDC converter and all other control blocks.
EN_DCDC 8 10 I Enable DCDC converter
MODE 7 9 I Selects force PWM or PWM/PFM automatic transition mode
VINLDO1 13 15 I Input voltage to LDO1
EN_LDO1 1 3 I Enable LDO1
VINLDO2 16 18 I Input voltage to LDO2
EN_LDO2 2 4 I Enable LDO2
PGND 4 6 Power ground – Connected to the PowerPAD™
AGND 10 12 Analog ground - Star back to PGND as close to the IC as possible.
PG 3 5 O Open drain active low power good output.
SW 5 7 O Switch pin – connect inductor here
FB_DCDC 9 11 I Voltage to DCDC error amplifier
VLDO1 12 14 O LDO1 output voltage
VLDO2 15 17 O LDO2 output voltage
FB_LDO1 11 13 I Voltage to LDO1 error amplifier
FB_LDO2 14 16 I Voltage to LDO2 error amplifier
RSTSNS – 19 I Voltage for RST generation
RST – 20 O Open drain active low reset output.
MR – 1 I Active low input to force a reset.
(1)
TRST – 2 I/O Capacitor connection for setting reset time.
(1) External pull up on MR is required.
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Product Folder Link(s): TPS65000 TPS65001 TPS650001 TPS650003 TPS650006 TPS650061