Datasheet

Z
LOAD
A
EN_LDO1
VLDO1
VINLDO1
FB_LDO1
P
P
A
DISCHG
AGND
PGND
+
-
θ
JA
Diode
V
REF(LD01)
C
O(LD01)
R
LOD1_2
R
LDO1_1
( )
( )
LDO1_1 LDO1_2
LDO1 FB_LDO1
LDO1_2
LDO1_1 LDO1_2
LDO1
LDO1_2
R + R
V = V x
R
R + R
V = 0.5V x
R
TPS65000, TPS65001, TPS650001
TPS650003, TPS650006, TPS650061
www.ti.com SLVS810B –JUNE 2009–REVISED AUGUST 2010
Figure 24. LDO Block Diagram and Output Voltage Setting
The output voltages of the LDOs are set by Equation 2:
(2)
The combined resistance of R
LDO1_1
and R
LDO1_2
should be less than 1MΩ.
Oscillator and Spread Spectrum Clock Generation
The TPS6500x contains an internal oscillator running at a typical frequency of 2.25MHz. This frequency is the
fundamental switching frequency of the step-down converter when it is running in PWM mode. An additional
circuit in the oscillator block implements spread spectrum clocking, which modulates the main switching
frequency when the device is in PWM mode. This spread spectrum oscillation reduces the power that may cause
EMI. When viewed in the frequency domain, the SSC spreads out the frequency that may introduce interference
while simultaneously reducing the power. Since the frequency is continually shifting, the amount of time the
switcher spends at any single frequency is reduced. This reduction in time means that the receiver that may see
the interference has less time to integrate the interference.
Different spin versions of SSC settings are also feasible; contact a Texas Instruments sales representative for
more information.
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