Datasheet

Heavy Load transient step
Vo
PFM mode at light load
current
PWM mode
Comparator High
Comparator low
Absolute Voltage drop
with positioning
3.5%
3%
2.5%
V - V
IN
OUT
Duty Cycle Boost D =
V
OUT
Maximum Output Current Boost I = x I x (1 - D)
OUT SW
h
V
OUT
Duty Cycle Buck D =
V
IN
Maximum Output Current Buck I = I
OUT SW
TPS63060
TPS63061
www.ti.com SLVSA92A –DECEMBER 2011–REVISED FEBRUARY 2012
Figure 29. Power-Save Mode Thresholds and Dynamic Voltage Positioning
Dynamic voltage positioning
As detailed in Figure 29, the output voltage is typically 3% above the nominal output voltage at light load
currents, as the device is in Power Save Mode. This gives additional headroom for the voltage drop during a load
transient from light load to full load. This allows the converter to operate with a small output capacitor and still
have a low absolute voltage drop during heavy load transient changes. See Figure 29 for detailed operation of
the Power Save Mode
Dynamic Current limit
In order to keep the output voltage regulated when the power source becomes weaker the device has
implemented a dynamic current limit function. The maximum current allowed through the switch depends on the
voltage applied at the input terminal of the TPS6306X. The curve in Figure 30 shows this dependency, and the
I
SW
versus V
IN
. The dynamic current limit has its lowest value when reaching the minimum recommended supply
voltage at V
IN
.
Given the I
SW
value from Figure 30, is then possible to calculate the output current reached in boost mode using
Equation 1 and Equation 2 and in buck mode using Equation 3 and Equation 4.
(1)
(2)
(3)
(4)
With,
η = Estimated converter efficiency (use the number from the efficiency curves or 0.80 as an assumption)
f = Converter switching frequency (typical 2.4 MHz)
L = Selected inductor value
Copyright © 2011–2012, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Link(s): TPS63060 TPS63061