Datasheet

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DSKPACKAGE
(TOP VIEW)
TPS62750, TPS62751
SLVS955A –JULY 2009–REVISED SEPTEMBER 2009 ................................................................................................................................................. www.ti.com
DEVICE INFORMATION
PIN ASSIGNMENTS
PIN FUNCTIONS
PIN
I/O DESCRIPTION
NAME NO.
PGND 1 Power GND Pin for the N-MOSFET
L 2 OUT This is the switch pin and is connected to the internal MOSFET switches. Connect the external inductor between
this terminal and the output capacitor.
H/L 3 IN H/L pin = high enables the upper current limit threshold set by R
SET_H
. H/L pin = low enables the lower current
limit threshold set by R
SET_L
. This pin must be terminated.
EN 4 IN This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode. Pulling this pin
to high enables the device. This pin must be terminated.
FB 5 IN Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of fixed
output voltage option, connect this pin directly to the output capacitor
AGND 6 Analog GND Pin for the internal analog circuitry.
ISET_L 7 IN Sets the lower average input current limit by external resistor.
ISET_U 8 IN Sets the upper average input current limit by external resistor.
PVIN 9 IN VIN power supply pin for the Output stage
AVIN 10 IN VIN low noise analog supply for the internal analog circuitry. This pin must be connected to PVIN
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Product Folder Link(s) :TPS62750, TPS62751