Datasheet

AV
IN
PGND
EN
FB
VIN
10µF
V
OUT
C
IN
2.2µH
C
O
I
LIM_L
R
LIM_L
H/L
Wireless
BB + PMIC
TPS62750
PA
PMU, DCDC, LDO
3.7V
WirelessModule
I
LIM_U
GND
C
BUFF
R
LIM_U
R1
R2
C
ff
USB
5.0V
1
OUT REF
2
R
V = V 1 + with an internal reference voltage VREF typical 0.6V
R
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TPS62750, TPS62751
www.ti.com ................................................................................................................................................. SLVS955A –JULY 2009–REVISED SEPTEMBER 2009
APPLICATION INFORMATION
Figure 26. TPS62750DSK in a typical USB Datacard application
A growing variety of applications in notebooks, PCs and other mobile systems, TDMA data communication
techniques, which require peak current (typically 2A) during the transmission of signals that can exceed the
maximum current specified by the USB standard. Therefore, the application must be designed to limit the input
power and draw on card-based storage for most of the energy requirement during a typical transmission cycle.
A typical GSM signal is transmitted over the carrier at a rate of 216 Hz (4.616ms pulse repetition interval). The
transmission period is divided into eight time slots and depending on the power class being used, the duty cycle
of this high current pulse can range anywhere between one-eighth of the cycle (577us) up to half of the
transmission cycle (2.308ms).
The TPS62750 external current limit programming resistors can be easily used to adjust the required input
current limit, thereby allowing the user to stay well within the specification requirement stipulated by USB. The
TPS62750 is a high efficiency buck converter with programmable input average current limit that provides the
needed flexibility when designing a GSM/GPRS power supply solution. The high efficiency of the converter
maximizes the average output power without overloading the bus. A bulk output capacitor is used to supply the
energy and maintain the output voltage during the high current pulses
OUTPUT VOLTAGE SETTING
(1)
To minimize the current through the feedback divider network, we recommend that the R2 resistor value be 180k.
The sum of R1 and R2 should not exceed ~1.5MΩ, to keep the network robust against noise.
An external feed forward capacitor C
ff
is required for optimum load transient response. The value of C
ff
should be
a minimum of 470pF (see table below). Route the FB line away from noise sources, such as the inductor or the
SW line.
OUTPUT CAPACITOR FEEDFORWARD CAPACITOR
1 mF – 2.5 mF 470 pF
> 2.5 mF 1 nF
Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 17
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