Datasheet

Test Summary

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4.3 Test Procedure

1. Make sure that the EVM setup is according to Table 1 and Figure 1, and preset the power supply to

3.3 VDC at a current limit of approximately 150 mA.

2. Turn on the input supply and verify the input voltage is approximately 3.3 VDC (DMM 1) and the output

voltage is at approximately 2.1 or 2.3 VDC for TPS62730 or TPS62733, respectively (DMM 2).

3. Look at CH1 and CH2 and verify that the duty cycle is near 70% and the ripple is less than 10-mV

ripple; see Figure 6 for typical waveforms.

4. Vary the load between 0 and 100 mA [1 kΩ to 21 Ω (TPS62730) or 1 kΩ to 23 Ω (TPS62733)].

Observe the change in the switching waveform from PFM with discontinuous ringing to PWM mode. It

may be necessary to change the time scale on the scope to 1 µs/div for light loads. See Figure 7 and

Figure 8 for various loads. Set the load back to approximately 21 Ω.

5. Vary the input voltage from 3.3 VDC to 3.9 VDC and back to 2.4 VDC to see the change in duty cycle.

6. Reduce the input voltage from 2.4 VDC to 1.9 VDC and verify that the switcher automatically goes into

bypass mode, disabling the switcher and turning on the internal bypass FET. The output should be the

input voltage minus the IR drop across the pass FET (approximately 2 Ω). The STAT pin should go to

the high-impedance state with R1 pulling it to the output voltage. Conditions for the capture of Figure 9

were: CH2 moved to the J7 (STAT) header relative to ground, 1 V/div, dc-coupled, the time scale set

to 50 µs/div (a slower time scale may be required, depending on power-supply decay), single-

sequence trigger on CH2, and input power removed. The figure shows the switch node going into

PFM, then disabling switching, and then indicating bypass mode by R1 pulling the STAT pin up to the

output voltage (approximately 2.2 VDC).

CAUTION

The following step disables the buck converter and switches the input voltage

to the output. Make sure not to exceed the maximum system input voltage in

this step or the later steps that place the JP1 shunt in the bypass position.

7. Move the shunt on jumper JP1 from the ON position to the Bypass position. Notice that this action

disables the switcher and switches the input voltage to the output via the bypass switch. The output

should be the input voltage minus the IR drop across the pass FET (approximately 2 Ω). The STAT pin

should go to the high-impedance state with R1 pulling it to the output voltage. Move the shunt on

jumper JP1 to the ON position.

8. For steps 9 through 13, one can view the figure and determine the oscilloscope setup.

9. See Figure 10 for the transition from converter switch mode to bypass mode by pulling the ON/BYP pin

low.

10. Remove the bypass jumper to see the transition from bypass mode to converter switch mode; see

Figure 11.

11. See Figure 12 for typical hot-plug power up.

12. See Figure 13 for the transient output-load step from 50 mA to 100 mA.

13. See Figure 14 for the transient output-load step from 100 mA to 50 mA.

TPS62730, TPS62733 Stepdown Converters With Bypass Mode for Ultralow- SLVU455A–April 2011–Revised August 2012

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