Datasheet
MODE
ENABLE
C
I
L
V
IN
C
O
V
OUT
GND
TPS62620, TPS62621
TPS62622, TPS62623
TPS62624, TPS62625
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SLVS848C –JULY 2009– REVISED AUGUST 2011
LAYOUT CONSIDERATIONS
As for all switching power supplies, the layout is an important step in the design. High-speed operation of the
TPS6262x devices demand careful attention to PCB layout. Care must be taken in board layout to get the
specified performance. If the layout is not carefully done, the regulator could show poor line and/or load
regulation, stability and switching frequency issues as well as EMI problems. It is critical to provide a low
inductance, impedance ground path. Therefore, use wide and short traces for the main current paths.
The input capacitor should be placed as close as possible to the IC pins as well as the inductor and output
capacitor. In order to get an optimum ESL step, the output voltage feedback point (FB) should be taken in the
output capacitor path, approximately 1mm away for it. The feed-back line should be routed away from noisy
components and traces (e.g. SW line).
Figure 40. Suggested Layout (Top)
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