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OUT2

SW1

FB1

SW2

ADJ2

DEF_1

OUT2

10 μF

VIN2.5V – 6V

VIN

EN_1

EN_2

MODE/

DATA

TPS62420

GND

Upto1000mA

R21

360kΩ

R22

180kΩ

=1.8V

2.2 μH

C =22 µF

ff2

33pF

upto600mA

R11

270kΩ

R12

180kΩ

OUT1

=1.5V

2.2 μH

OUT1

=22 µF

100

0.01 0.1 1 10 100 1000

OUT

Efficiency

=3.6V

MODE/DATA =0

OUT1

=1.5V

OUT2

=1.8V

TPS62420-Q1

www.ti.com

SLVSA56 –DECEMBER 2009

2.25-MHz 600-mA/1000-mA DUAL STEP-DOWN CONVERTER

Check for Samples: TPS62420-Q1

FEATURES

• Qualified for Automotive Applications • Power Save Mode at Light Load Currents

• High Efficiency: Up to 95% • 180° Out of Phase Operation

• V

Range From 2.5 V to 6 V • Output Voltage Accuracy in PWM Mode: ±1%

• 2.25-MHz Fixed Frequency Operation • Typical 32-μA Quiescent Current for Both

Converters

• Output Current: 600 mA and 1000 mA

• 100% Duty Cycle for Lowest Dropout

• Adjustable Output Voltage From 0.6 V to V

• Available in a 10-Pin QFN (3×3mm)

• EasyScale™ Optional One-Pin Serial Interface

for Dynamic Output Voltage Adjustment

DESCRIPTION

The TPS62420 device is a synchronous dual step-down dc-dc converter optimized for battery-powered portable

applications. It provides two independent output voltage rails powered by 1-cell Li-Ion or 3-cell NiMH/NiCD

batteries. The device is also suitable to operate from a standard 3.3-V or 5-V voltage rail.

With the EasyScale™ serial interface the output voltages can be modified during operation. It therefore supports

Dynamic Voltage Scaling for low power DSP and processors.

The TPS62420 operates at 2.25-MHz fixed switching frequency and enters Power Save Mode operation at light

load currents to maintain high efficiency over the entire load current range. For low-noise applications, the

devices can be forced into fixed-frequency PWM mode by pulling the MODE/DATA pin high. In the shutdown

mode, the current consumption is reduced to 1.2 μA. The device allows the use of small inductors and capacitors

to achieve a small solution size.

The TPS62420 is available in a 10-pin leadless package (3mm×3mm QFN).

ORDERING INFORMATION

(1)

PACKAGE

(2)

ORDERABLE PART NUMBER TOP-SIDE MARKING

–40°C to 125°C QFN – DRC Reel of 3000 TPS62420QDRCRQ1 OEP

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

web site at www.ti.com.

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (36 pages)

PAGE 1
TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 2.25-MHz 600-mA/1000-mA DUAL STEP-DOWN CONVERTER Check for Samples: TPS62420-Q1 FEATURES 1 • • • • • • • Qualified for Automotive Applications High Efficiency: Up to 95% VIN Range From 2.5 V to 6 V 2.25-MHz Fixed Frequency Operation Output Current: 600 mA and 1000 mA Adjustable Output Voltage From 0.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) Input voltage range on VIN (2) V V 500 μA Voltage on SW1, SW2 –0.3 to 7 V Voltage on ADJ2, FB1 –0.3 to VIN +0.3, ≤7 V 150 °C –65 to 150 °C Maximum current into MODE/DATA TJ(max) Maximum junction temperature Tstg Storage temperature range (2) UNIT –0.3 to VIN +0.3, ≤7 Voltage range on EN, MODE/DATA, DEF_1 (1) VALUE –0.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 ELECTRICAL CHARACTERISTICS VIN = 3.6V, VOUT = 1.8V, EN = VIN, MODE = GND, L = 2.2μH, COUT = 20μF, TJ = TA = –40°C to 125°C (unless otherwise noted). TYP values are at TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT VIN Input voltage range IQ Operating quiescent current ISD Shutdown current VUVLO Undervoltage lockout threshold 6.0 V One converter, IOUT = 0mA.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com ELECTRICAL CHARACTERISTICS (continued) VIN = 3.6V, VOUT = 1.8V, EN = VIN, MODE = GND, L = 2.2μH, COUT = 20μF, TJ = TA = –40°C to 125°C (unless otherwise noted). TYP values are at TA = 25°C PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 280 620 mΩ 1 μA 200 450 mΩ 6 7.5 μA 0.85 1.0 1.15 A 1.19 1.4 1.61 POWER SWITCH RDS(ON) P-channel MOSFET on-resistance, converter 1,2 VIN = VGS = 3.6V ILK_PMOS P-channel leakage current VDS = 6.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 DEVICE INFORMATION PIN ASSIGNMENTS ADJ2 1 MODE/DATA 2 VIN 3 FB1 4 DEF_1 5 e w o P 10 SW2 9 EN2 8 GND 7 EN1 6 SW1 AD rP Top view DRC package TERMINAL FUNCTIONS TERMINAL NAME NO. (QFN) I/O DESCRIPTION ADJ2 1 I Input to adjust output voltage of converter 2. In adjustable version (TPS62420) connect a external resistor divider between VOUT2, this pin and GND to set output voltage between 0.6V and VIN.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com FUNCTIONAL BLOCK DIAGRAM VIN PMOS Current Limit Comparator Converter 1 VIN FB_VOUT Thermal Shutdown Softstart VREF +1% Skip Comp. EN1 FB_VOUT VREF- 1% Ext. res. network DEF1 Skip Comp. Low VREF Control Stage Error Amp. Internal FB VOUT1 compensated Int. Resistor Network PWM Comp. Cff 25pF SW1 MODE Register RI 1 Sawtooth Generator DEF1_High RI3 RI..
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 PARAMETER MEASUREMENT INFORMATION TPS62420 VIN 2.5 V - 6 V VIN FB 1 SW1 CIN 10 mF L1 2.2 mH LPS4018 VOUT1 R11 COUT1 2x10 mF GRM21BR61A106K DEF_1 R12 EN_1 L2 EN_2 VOUT2 SW2 2.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com TYPICAL CHARACTERISTICS TABLE OF GRAPHS FIGURE NO. Efficiency VOUT1 = 1.1V 1 Efficiency VOUT1 = 1.575V 2 Efficiency VOUT2 = 1.8V 3 Efficiency VOUT2 = 3.3V 4 Efficiency vs VIN DC Output Accuracy VOUT1 = 1.1V 5, 6 7 DC Output Accuracy VOUT2 = 3.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 EFFICIENCY VOUT1 = 1.1V EFFICIENCY VOUT1 = 1.575V 100 90 100 VOUT1 = 1.575 V VOUT1 = 1.1 V 90 80 80 VIN = 2.7 V VIN = 2.7 V VIN = 3.6 V 60 VIN = 3.6 V VIN = 5 V 50 VIN = 5 V 40 30 20 Forced PWM Mode MODE/DATA = 1 50 Power Save Mode MODE/DATA = 0 0.1 1 10 100 0 0.01 1000 0.1 1 1000 EFFICIENCY VOUT2 = 3.3V 100 VOUT2 = 1.8 V 90 80 80 VIN = 2.7 V VIN = 2.7 V VIN = 3.6 V VIN = 3.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com EFFICIENCY vs VIN , VOUT1 = 1.575V EFFICIENCY vs VIN, VOUT2 = 3.3V 100 100 MODE/DATA = 0 VOUT = 1.575 V 95 IOUT = 100 mA IOUT = 200 mA 90 90 IOUT = 10 mA 85 80 Efficiency Efficiency MODE/DATA = 0 VOUT = 3.3 V IOUT = 10 mA IOUT = 1 mA 75 70 IOUT = 1 mA 80 70 65 60 60 55 50 2 3 4 5 50 6 3 VIN - V 4 Figure 5. DC OUTPUT ACCURACY VOUT1 = 1.575V DC OUTPUT ACCURACY VOUT2 = 3.3V 3.4 VOUT1 = 1.575 V VIN = 5 V PWM Mode Operation 3.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 FOSC vs VIN Iq FOR ONE CONVERTER, NOT SWITCHING 24 2.5 2.45 23 2.4 85°C 22 Iddq - mA Fosc - MHz 2.35 2.3 -40°C 2.25 2.2 25°C 21 20 25°C -40°C 2.15 85°C 19 2.1 18 2.05 2 2.5 3 3.5 4 4.5 VIN - V 5 17 2.5 6 5.5 3 3.5 4 4.5 5 5.5 6 5 5.5 6 VIN - V Figure 9. Figure 10. Iq FOR BOTH CONVERTERS, NOT SWITCHING RDSON PMOS vs VIN 0.55 42 0.5 40 0.45 38 RDSon - W Iddq - mA 85°C 36 25°C 34 0.4 85°C 0.35 25°C 0.3 32 0.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com LIGHT LOAD OUTPUT VOLTAGE RIPPLE IN POWER SAVE MODE RDSON NMOS vs VIN 0.3 Power Save Mode Mode/Data = low IOUT = 10mA 0.25 RDSon - W 85°C VOUT = 1.8V 20mV/Div 0.2 25°C -40°C Inductor current 100mA/Div 0.15 0.1 0.05 2.5 3 3.5 4 4.5 5 5.5 6 VIN - V Time base - 10 ms/Div Figure 13. Figure 14.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 FORCED PWM/PFM MODE TRANSITION Forced PWM Mode MODE/DATA 1V/Div LOAD TRANSIENT RESPONSE PFM/PWM VOUT = 1.575V 50mV/Div MODE/DATA = low Enable Power Save Mode Entering PFM Mode Voltage positioning active Voltage positioning in PFM Mode reduces voltage drop during load step PWM Mode operation IOUT1 = 540mA VOUT 20mV/Div VOUT = 1.8V IOUT = 20mA IOUT 200mA/Div IOUT= 60mA Time base - 20 ms/Div Time base - 100 ms/Div Figure 17. Figure 18.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com TYPICAL OPERATION VIN = 3.6V, VOUT1 = 1.575V, VOUT2 = 1.8V STARTUP TIMING ONE CONVERTER EN1 / EN2 5V/Div SW1 5V/Div VIN = 3.8V IOUT1 max = 400mA I coil1 200mA/Div VOUT1 500mV/Div SW2 5V/Div SW1 1V/Div Icoil2 200mA/Div Icoil 500mA/Div VIN 3.6V, VOUT1: 1.575V VOUT2: 1.8V I OUT1 = IOUT2 = 200mA Time base - 100 ns/Div Time base - 200 ms/Div Figure 21. Figure 22. TYPICAL OPERATION VIN = 3.6V, VOUT1 = 1.8V, VOUT2 = 3.0V TYPICAL OPERATION VIN = 3.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 VOUT1 CHANGE WITH EASYSCALE MODE/DATA 2V/Div VOUT1 : 200mV/Div VOUT1: 1.1V VOUT1 : 1.5V VIN 3.8V ACKN = off IOUT1 = 150mA REG_DEF_1_Low Time base - 100 ms/Div Figure 25.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com DETAILED DESCRIPTION OPERATION The TPS62420 includes two synchronous step-down converters. The converters operate with typically 2.25-MHz fixed frequency pulse width modulation (PWM) at moderate to heavy load currents. If Power Save Mode is enabled, the converters automatically enter Power Save Mode at light load currents and operates in PFM (Pulse Frequency Modulation).
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 In order to keep the output voltage ripple in Power Save Mode low, the output voltage is monitored with a single threshold comparator (skip comparator). As the output voltage falls below the skip comparator threshold (skip comp) of 1.01 x VOUTnominal, the corresponding converter starts switching for a minimum time period of typically 1μs and provides current to the load and the output capacitor.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com EN 95% 5% VOUT tStartup tRAMP Figure 27. Soft Start 100% Duty Cycle Low Dropout Operation The converters offer a low input to output voltage difference while still maintaining operation with the use of the 100% duty cycle mode. In this mode the P-channel switch is constantly turned on. This is particularly useful in battery-powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range; i.e.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 In case the operation mode will be changed from forced PWM mode (MODE/DATA = high) to Power Save Mode Enable (MODE/DATA = 0) the Power Save Mode will be enabled after a delay time of typically ttimeout, which is a maximum of 520μs. The forced PWM Mode operation is enabled immediately with Pin MODE/DATA set to 1. ENABLE The device has for each converter a separate EN pin to start up each converter independently.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com The transmission of each byte needs to be closed with an End Of Stream condition for at least TEOS. Addressable Registers In TPS62420 two registers with a data content of 5 bits can be addressed to change the output voltage of both converters. With 5 bit data content, 32 different values for each register are available. Table 1 shows the addressable registers if DEF_1 pin acts as analog input with external resistors connected.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 MODE Selection Because of the MODE/DATA pin is used for two functions, interface and a MODE selection, the device needs to determine when it has to decode the bit stream or to change the operation mode. The device enters forced PWM mode operation immediately whenever the MODE/DATA pin turns to high level. The device stays also in forced PWM mode during the whole time of a protocol reception.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com Table 2.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 tLow tHigh Low Bit (Logic 0) tLOW tHigh High Bit (Logic 1) Figure 31. EasyScale – Bit Coding MODE/DATA ttimeout Power Save Mode Forced PWM MODE Power Save Mode Figure 32. MODE/DATA PIN: Mode Selection tStart Address Byte tStart DATA Byte MODE/DATA TEOS TEOS ttimeout Power Save Mode Forced PWM MODE Power Save Mode Figure 33.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com Table 3. Selectable Output Voltages for Converter 1, With DEF1 Pin as Analog Input (TPS62420) 0 TPS62420 OUTPUT VOLTAGE [V] REGISTER REG_DEF_1_LOW D4 D3 D2 D1 D0 VOUT1 Adjustable Output With Resistor Network on DEF_1 Pin 0 0 0 0 0 0.6V with DEF_1 Pin connected to VOUT1 24 1 0.825 0 0 0 0 1 2 0.85 0 0 0 1 0 3 0.875 0 0 0 1 1 4 0.9 0 0 1 0 0 5 0.925 0 0 1 0 1 6 0.95 0 0 1 1 0 7 0.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 Table 4. Selectable Output Voltages for Converter 2, (ADJ2 Connected to VOUT) 0 OUTPUT VOLTAGE [V] FOR REGISTER REG_DEF_2 D4 D3 D2 D1 D0 VOUT2 Adjustable Output With Resistor Network on ADJ2 0 0 0 0 0 0.6V with ADJ2 Pin connected to VOUT2 1 0.85 0 0 0 0 1 2 0.9 0 0 0 1 0 3 0.95 0 0 0 1 1 4 1.0 0 0 1 0 0 5 1.05 0 0 1 0 1 6 1.1 0 0 1 1 0 7 1.15 0 0 1 1 1 8 1.2 0 1 0 0 0 9 1.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 www.ti.com APPLICATION INFORMATION OUTPUT VOLTAGE SETTING Converter1 Adjustable Default Output Voltage Setting The output voltage can be calculated to: V OUT + VREF ǒ R 1 ) 11 R 12 Ǔ with an internal reference voltage VREF typical 0.6V (4) To keep the operating current to a minimum, it is recommended to select R12 within a range of 180kΩ to 360kΩ. The sum of R12 and R11 should not exceed ~1MΩ. For higher output voltages than 3.
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TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 Inductor Selection The selected inductor has to be rated for its DC resistance and saturation current. The DC resistance of the inductance will influence directly the efficiency of the converter. Therefore an inductor with lowest DC resistance should be selected for highest efficiency. Equation 6 calculates the maximum inductor current under static load conditions.
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TPS62420-Q1 SLVSA56 – DECEMBER 2009 DVout + Vout www.ti.com 1 * Vout ǒ8 Vin L ƒ 1 Cout ƒ Ǔ ) ESR (9) Where the highest output voltage ripple occurs at the highest input voltage Vin. At light load currents the converters operate in Power Save Mode and the output voltage ripple is dependent on the output capacitor value. The output voltage ripple is set by the internal comparator delay and the external capacitor.
PAGE 29
TPS62420-Q1 www.ti.com SLVSA56 – DECEMBER 2009 COUT1 CIN GND Pin connected with Power Pad COUT2 Figure 36.
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PACKAGE OPTION ADDENDUM www.ti.com 14-Jan-2010 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing TPS62420QDRCRQ1 ACTIVE SON DRC Pins Package Eco Plan (2) Qty 10 3000 Green (RoHS & no Sb/Br) Lead/Ball Finish CU NIPDAU MSL Peak Temp (3) Level-3-260C-168 HR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device TPS62420QDRCRQ1 Package Package Pins Type Drawing SON DRC 10 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 3000 330.0 12.4 Pack Materials-Page 1 3.3 B0 (mm) K0 (mm) P1 (mm) 3.3 1.1 8.0 W Pin1 (mm) Quadrant 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS62420QDRCRQ1 SON DRC 10 3000 367.0 367.0 35.
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IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete.